JAJSPZ5F September   2005  – March 2023 SN65HVD50 , SN65HVD51 , SN65HVD52 , SN65HVD53 , SN65HVD54 , SN65HVD55

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Available Options
  6. Pin Configurations
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Recommended Operating Conditions
    3. 7.3 Electrostatic Discharge Protection
    4. 7.4 Driver Electrical Characteristics
    5. 7.5 Driver Switching Characteristics
    6. 7.6 Receiver Electrical Characteristics
    7. 7.7 Receiver Switching Characteristics
    8. 7.8 Thermal Characteristics
    9. 7.9 Typical Characteristics
  8. Parameter Measurement Information
  9. Device Information
    1. 9.1 Ll-Power Standby Mode
    2. 9.2 Function Tables
    3. 9.3 Equivalent Input and Output Schematic Diagrams
  10. 10Application and Implementation
    1. 10.1 Thermal Characteristics of IC Packages
  11. 11Device and Documentation Support
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 サポート・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Driver Switching Characteristics

over recommended operating conditions unless otherwise noted
PARAMETERTEST CONDITIONSMINTYP(1)MAXUNIT
tPLHPropagation delay time, low-to-high-level outputHVD50, HVD53RL = 54 Ω, CL = 50 pF,
See Figure 8-5
4812ns
HVD51, HVD54202946
HVD52, HVD5590143230
tPHLPropagation delay time, high-to-low-level outputHVD50, HVD534812ns
HVD51, HVD54203046
HVD52, HVD5590143230
trDifferential output signal rise timeHVD50, HVD533612ns
HVD51, HVD54203460
HVD52, HVD55120197300
tfDifferential output signal fall timeHVD50, HVD533611ns
HVD51, HVD54203360
HVD52, HVD55120192300
tsk(p)Pulse skew (|tPHL – tPLH|)HVD50, HVD531.4ns
HVD51, HVD541.6
HVD52, HVD557.4
tsk(pp)(2)Part-to-part skewHVD50, HVD531ns
HVD51, HVD544
HVD52, HVD5522
tPZH1Propagation delay time, high-impedance-to-high-level outputHVD53RL = 110 Ω, RE at 0 V,
See Figure 8-6
D = 3 V and S1 = Y,
D = 0 V and S1 = Z
30ns
HVD54180
HVD55380
tPHZPropagation delay time, high-level-to-high-impedance outputHVD5316ns
HVD5440
HVD55110
tPZL1Propagation delay time, high-impedance-to-low-level outputHVD53RL = 110 Ω, RE at 0 V,
See Figure 8-7
D = 3 V and S1 = Z,
D = 0 V and S1 = Y
23ns
HVD54200
HVD55420
tPLZPropagation delay time, low-level-to-high-impedance outputHVD5319ns
HVD5470
HVD55160
tPZH2Propagation delay time, standby-to-high-level outputRL = 110 Ω, RE at 3 V,
See Figure 8-6
D = 3 V and S1 = Y,
D = 0 V and S1 = Z
3300ns
tPZL2Propagation delay time, standby-to-low-level outputRL = 110 Ω, RE at 3 V,
See Figure 8-7
D = 3 V and S1 = Z,
D = 0 V and S1 = Y
3300ns
All typical values are at 25°C and with a 5-V supply.
tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.