JAJSEB5C July   2013  – January 2018 SN65HVD888

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      極性訂正機能(POLCOR)を備えた標準的なネットワーク・アプリケーション
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: JEDEC Specifications
    3. 6.3 ESD Ratings: IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Power Dissipation Characteristics
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement information
    1. 7.1 Driver
    2. 7.2 Receiver
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low-Power Standby Mode
      2. 8.3.2 Bus Polarity Correction
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Device Configuration
      2. 9.1.2 Bus Design
      3. 9.1.3 Cable Length Versus Data Rate
      4. 9.1.4 Stub Length
      5. 9.1.5 3- to 5-V Interface
      6. 9.1.6 Noise Immunity
      7. 9.1.7 Transient Protection
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Design and Layout Considerations For Transient Protection
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.4 Recommended Operating Conditions

MINNOMMAXUNIT
VCC Supply voltage 4.5 5 5.5 V
VID Differential input voltage –12 12 V
VI Input voltage at any bus terminal (separate or common mode)(1) –7 12 V
VIH High-level input voltage (driver, driver-enable, and receiver-enable inputs) 2 VCC V
VIL Low-level input voltage (driver, driver-enable, and receiver-enable inputs) 0 0.8 V
IO Output current Driver –60 60 mA
Receiver –8 8
CL Differential load capacitance 50 pF
RL Differential load resistance 60 Ω
1/tUI Signaling rate 0.3 250 kbps
TJ Junction temperature –40 150 °C
TA(2) Operating free-air temperature (see Thermal Information for additional information) –40 125 °C
(1) The algebraic convention in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
(2) Operation is specified for internal (junction) temperatures up to 150°C. Self-heating due to internal power dissipation should be considered for each application. Maximum junction temperature is internally limited by the thermal shut-down (TSD) circuit which disables the driver outputs when the junction temperature reaches 170°C.