SLLS995D February   2010  – May 2015 SN65HVDA1040A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Power Dissipation Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Modes
        1. 8.3.1.1 Bus States by Mode
        2. 8.3.1.2 Normal Mode
        3. 8.3.1.3 Standby Mode and RXD Wake-Up Request
      2. 8.3.2 Protection Features
        1. 8.3.2.1 TXD Dominant State Time-Out
        2. 8.3.2.2 Thermal Shutdown
        3. 8.3.2.3 Undervoltage Lockout and Unpowered Device
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Using With 3.3-V Microcontrollers
      2. 9.1.2 Using SPLIT With Split Termination
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Bus Loading, Length, and Number of Nodes
        2. 9.2.1.2 CAN Termination
        3. 9.2.1.3 Loop Propagation Delay
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Transient Voltage Suppresser (TVS) Diodes
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 PCB and Thermal Considerations for VSON Package
    4. 11.4 ESD Protection
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

1 Features

  • Qualified for Automotive Applications
  • Meets or Exceeds the Requirements of ISO 11898-2 and -5
  • GIFT/ICT Compliant
  • ESD Protection up to ±12 kV (Human Body Model) on Bus Pins
  • Low-Current Standby Mode With Bus Wakeup, <12 µA Maximum
  • High Electromagnetic Compliance (EMC)
  • SPLIT Voltage Source for Common-Mode Stabilization of Bus Through Split Termination
  • Digital Inputs Compatible With 3.3-V and 5-V Microprocessors
  • Package Options: SOIC and VSON
  • Protection Features
    • Bus-Fault Protection of –27 V to 40 V
    • TXD Dominant Time-Out
    • Thermal Shutdown Protection
    • Power Up and Power Down Glitch-Free Bus Inputs and Outputs
    • High Bus Input Impedance With Low VCC (Ideal Passive Behavior on Bus When Unpowered)

2 Applications

  • GMW3122 Dual-Wire CAN Physical Layer
  • SAE J2284 High-Speed CAN for Automotive Applications
  • SAE J1939 Standard Data Bus Interface
  • ISO 11783 Standard Data Bus Interface
  • NMEA 2000 Standard Data Bus Interface

3 Description

The SN65HVDA1040A-Q1 device meets or exceeds the specifications of the ISO 11898 standard for use in applications employing a Controller Area Network (CAN). The device is qualified for use in automotive applications. As a CAN transceiver, this device provides differential transmit capability to the bus and differential receive capability to a CAN controller at signaling rates up to 1 megabit per second (Mbps). The signaling rate of a line is the number of voltage transitions that are made per second, expressed in the units bps (bits per second).

The device is designed for operation in especially harsh environments and includes many device protection features such as undervoltage lock out (UVLO), overtemperature thermal shutdown, wide common-mode range, and loss of ground protection. The bus pins are also protected against external cross-wiring, shorts to –27 V to 40 V, and voltage transients according to ISO 7637.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN65HVDA1040A-Q1 VSON (12) 3.00 mm × 4.00 mm
SOIC (8) 4.90 mm × 3.91 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

SN65HVDA1040A-Q1 block_diag_slls995.gif

4 Revision History

Changes from C Revision (February 2011) to D Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go