JAJSUB7G October   2000  – April 2024 SN65LBC174A , SN75LBC174A

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Dissipation Rating Table
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measure Information
  8. Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
  10. Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • N|16
  • DW|16
  • DW|20
サーマルパッド・メカニカル・データ
発注情報

Parameter Measure Information

SN65LBC174A SN75LBC174A Test Circuit, VOD Without Common-Mode LoadingFigure 6-1 Test Circuit, VOD Without Common-Mode Loading
SN65LBC174A SN75LBC174A Test Circuit, VOD With Common-Mode LoadingFigure 6-2 Test Circuit, VOD With Common-Mode Loading
SN65LBC174A SN75LBC174A VOC Test CircuitFigure 6-3 VOC Test Circuit
SN65LBC174A SN75LBC174A Output Switching Test Circuit and WaveformsFigure 6-4 Output Switching Test Circuit and Waveforms
SN65LBC174A SN75LBC174A Enable Timing Test Circuit and Waveforms, tPZH and tPHZFigure 6-5 Enable Timing Test Circuit and Waveforms, tPZH and tPHZ
SN65LBC174A SN75LBC174A Enable Timing Test Circuit and Waveforms, tPZL and tPLZFigure 6-6 Enable Timing Test Circuit and Waveforms, tPZL and tPLZ
SN65LBC174A SN75LBC174A Test Circuit, Short-Circuit Output CurrentFigure 6-7 Test Circuit, Short-Circuit Output Current
SN65LBC174A SN75LBC174A Test Circuit Waveform, Transient Overvoltage TestFigure 6-8 Test Circuit Waveform, Transient Overvoltage Test
SN65LBC174A SN75LBC174A Equivalent Input and Output Schematic
                    DiagramsFigure 6-9 Equivalent Input and Output Schematic Diagrams