JAJSKL8E june 2006 – october 2020 SN65LVDS302
PRODUCTION DATA
A low input signal on the RXEN pin puts the SN65LVDS302 into Shutdown mode. This turns off most of the receiver circuitry including the SubLVDS receivers, PLL, and deserializers. The subLVDS differential-input resistance remains 100 Ω, while any input signal is ignored. All outputs hold a static output pattern:
R[0:7] = G[0:7] = B[0:7] = VS = HS = high; DE = PCLK = low.
The current draw in Shutdown mode is nearly zero if the SubLVDS inputs are left open or pulled high.