SLLS881G December   2007  – October 2014 SN65LVDS315

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Device Electrical Characteristics
    6. 6.6 Output Electrical Characteristics
    7. 6.7 Input Electrical Characteristics
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Typical Blanking Power Consumption Test Pattern
    2. 7.2 Maximum Power Consumption Test Pattern
    3. 7.3 Jitter Performance
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Frame Counter Size
      2. 8.3.2 Data Formats
      3. 8.3.3 Parallel Input Port Timing Information
      4. 8.3.4 MIPI CSI-1 / CCP2-Class 0 Interface
      5. 8.3.5 Frame Structure and Synchronization Codes
      6. 8.3.6 Preventing Wrong Synchronization
      7. 8.3.7 Frame Structure
      8. 8.3.8 VS and HS Timing to Generate the Correct Control Signals
    4. 8.4 Device Functional Modes
      1. 8.4.1 Powerdown Modes
        1. 8.4.1.1 Shutdown Mode
        2. 8.4.1.2 Standby Mode
      2. 8.4.2 Active Modes
        1. 8.4.2.1 Acquire Mode (PLL Approaches Lock)
        2. 8.4.2.2 Transmit Mode
      3. 8.4.3 Status Detect and Operating Modes Flow Diagram
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Receiver Termination Requirement
      2. 9.1.2 Preventing Control Inputs From Increased Leakage Currents
    2. 9.2 Typical Application
      1. 9.2.1 VGA Camera Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Calculation Example: VGA Camera Sensor
          2. 9.2.1.2.2 Typical Application Frequencies
            1. 9.2.1.2.2.1 8-Bit Camera Application
        3. 9.2.1.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Power Supply Recommendations

The SN65LVDS315 was designed to operate reliably in a constricted environment with other digital switching ICs. In cell phone designs, the SN65LVDS315 often shares a power supply with various other ICs. The SN65LVDS315 can operate with power supply noise as specified in Recommended Operating Conditions. To minimize the power supply noise floor, provide good decoupling near the SN65LVDS315 power pins. The use of four ceramic capacitors (two 0.01 μF and two 0.1 μF) provides good performance. At the very least, it is recommended to install one 0.1 μF and one 0.01 μF capacitor near the SN65LVDS315. To avoid large current loops and trace inductance, the trace length between decoupling capacitor and IC power inputs pins must be minimized. Placing the capacitor underneath the SN65LVDS315 on the bottom of the pcb is often a good choice.