JAJSR29F November   1995  – February 2024 SN74AC564

PRODMIX  

  1.   1
  2. 特長
  3. 概要
  4. Pin Configuration and Functions
  5. Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Electrical Characteristics
    5. 4.5 Timing Requirements, VCC = 3.3 V ± 0.3 V
    6. 4.6 Timing Requirements, VCC = 5 V ± 0.5 V
    7. 4.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    8. 4.8 Switching Characteristics, VCC = 5 V ± 0.5 V
    9. 4.9 Operating Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DB|20
  • N|20
  • DW|20
  • PW|20
サーマルパッド・メカニカル・データ
発注情報

Pin Configuration and Functions

GUID-218DE3F4-8C55-4E26-BF5C-B26DBAF411B2-low.png Figure 3-1 SN74AC564 DB, DW, N, NS, or PW Package (Top View)
Table 3-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
OE 1 Input Output enable for all channels, active low
D1 2 Input Input for channel 1
D2 3 Input Input for channel 2
D3 4 Input Input for channel 3
D4 5 Input Input for channel 4
D5 6 Input Input for channel 5
D6 7 Input Input for channel 6
D7 8 Input Input for channel 7
D8 9 Input Input for channel 8
GND 10 Ground
CLK 11 Input Clock input for all channels, rising edge triggered
Q8 12 Output Output for channel 8
Q7 13 Output Output for channel 7
Q6 14 Output Output for channel 6
Q5 15 Output Output for channel 5
Q4 16 Output Output for channel 4
Q3 17 Output Output for channel 3
Q2 18 Output Output for channel 2
Q1 19 Output Output for channel 1
VCC 20 Positive supply