SCES578J June   2003  – September 2017 SN74AUP1G14

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics: CL = 5 pF
    7. 6.7  Switching Characteristics: CL = 10 pF
    8. 6.8  Switching Characteristics: CL = 15 pF
    9. 6.9  Switching Characteristics: CL = 30 pF
    10. 6.10 Operating Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 (Propagation Delays, Setup and Hold Times, and Pulse Width)
    2. 7.2 (Enable and Disable Times)
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS Push-Pull Outputs
      2. 8.3.2 Schmitt-Trigger Inputs
      3. 8.3.3 Clamp Diodes
      4. 8.3.4 Partial Power Down (Ioff)
      5. 8.3.5 Over-Voltage Tolerant Inputs
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DBV Package
5-Pin SOT-23
Top View
SN74AUP1G14 po2_01_ces578.gif
DCK Package
5-Pin SC70
Top View
SN74AUP1G14 po2_02_ces578.gif
DRL Package
5-Pin SOT
Top View
SN74AUP1G14 po2_03_ces578.gif
YFP Package
4-Pin DSBGA
Bottom View
SN74AUP1G14 YFP_DSBGA_pinout.gif
N.C. – No internal connection.
See mechancial drawings for dimensions.
DRY Package
6-Pin SON
Top View
SN74AUP1G14 po2_04_ces578.gif
DSF Package
6-Pin SON
Top View
SN74AUP1G14 po2_05_ces578.gif
DPW Package
5-Pin X2SON
Top View
SN74AUP1G14 DPW_Pinout.gif

Pin Functions

PIN I/O DESCRIPTION
NAME DBV, DCK, DRL, DPW DRY, DSF YFP
A 2 2 A1 I Logic Input
GND 3 3 B1 — Ground
N.C. 1 1, 5 — — No internal connection
VCC 5 6 A2 — Positive Supply
Y 4 4 B2 O Output