JAJSKB8E June   2008  – September 2024 SN74AVC2T245

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics: VCCA = 1.2 V
    7. 5.7  Switching Characteristics: VCCA = 1.5 V ± 0.1 V
    8. 5.8  Switching Characteristics: VCCA = 1.8 V ± 0.15 V
    9. 5.9  Switching Characteristics: VCCA = 2.5 V ± 0.2 V
    10. 5.10 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
    11. 5.11 Operating Characteristics
    12. 5.12 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2 V to 3.6 V Power-Supply Range
      2. 7.3.2 Partial-Power-Down Mode Operation
      3. 7.3.3 VCC Isolation
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Enable Times
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Voltage Ranges
        2. 8.2.2.2 Output Voltage Range
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.1.1 Enable Times

Calculate the enable times for the SN74AVC16T45 using the following formulas:

Equation 1. tPZH (DIR to A) = tPLZ (DIR to B) + tPLH (B to A)
Equation 2. tPZL (DIR to A) = tPHZ (DIR to B) + tPHL (B to A)
Equation 3. tPZH (DIR to B) = tPLZ (DIR to A) + tPLH (A to B)
Equation 4. tPZL (DIR to B) = tPHZ (DIR to A) + tPHL (A to B)

In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected. For example, if the SN74AVC2T245 initially is transmitting from A to B, then the DIR bit is switched; the B port of the device must be disabled before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified propagation delay.