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This 2-bit non-inverting bus transceiver uses two separate configurable power-supply rails. The A ports are designed to track VCCA and accepts any supply voltage from 1.2 V to 3.6 V. The B ports are designed to track VCCB and accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation and level-shifting between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.
The SN74AVCH2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR pin) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The SN74AVCH2T45 features active bus-hold circuitry, which holds unused or un-driven inputs at a valid logic state. TI does not recommend using pull-up or pull-down resistors with the bus-hold circuitry.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
SN74AVCH2T45 | SSOP (8) | 2.95 mm × 2.80 mm |
VSSOP (8) | 2.30 mm × 2.00 mm | |
DSBGA (8) | 1.89 mm × 0.89 mm |
Changes from G Revision (April 2015) to H Revision
Changes from F Revision (November 2007) to G Revision
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, then both outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.
Active bus-hold circuitry holds unused or un-driven inputs at a valid logic state. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
PIN | DESCRIPTION | ||
---|---|---|---|
NAME | SSOP, VSSOP |
DSBGA | |
VCCA | 1 | A1 | Supply Voltage A |
VCCB | 8 | A2 | Supply Voltage B |
GND | 4 | D1 | Ground |
A1 | 2 | B1 | Output or input depending on state of DIR. Output level depends on VCCA. |
A2 | 3 | C1 | Output or input depending on state of DIR. Output level depends on VCCA. |
B1 | 7 | B2 | Output or input depending on state of DIR. Output level depends on VCCB. |
B2 | 6 | C2 | Output or input depending on state of DIR. Output level depends on VCCB. |
DIR | 5 | D2 | Direction Pin, Connect to GND or to VCCA. |