JAJSEN7E December   2017  – December 2023 SN74AXC1T45

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Operating Characteristics: TA = 25°C
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuit and Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 0.65-V to 3.6-V Power-Supply Range
      2. 7.3.2 I/Os with Integrated Static Pull-Down Resistors
      3. 7.3.3 Support High-Speed Translation
      4. 7.3.4 Ioff Supports Partial-Power-Down Mode Operation
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Enable Times
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Logic Level-Shifting Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Logic Level-Shifting Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-Up Considerations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

GUID-20B611F9-ADCF-4A20-8587-5B22839D3850-low.gifFigure 4-1 DBV Package
6-Pin SOT-23
(Top View)
GUID-BE006DE5-EA00-4AC6-84E3-5A66AAAABF98-low.gifFigure 4-3 DRL Package
6-Pin SOT-5X3
(Top View)
GUID-18E5711B-840C-47AA-8162-7B2E047C1472-low.gifFigure 4-5 DTQ Package
6-Pin X2SON
(Transparent Top View)
GUID-1A04D58B-1D2E-42CF-B84B-711A864BAE08-low.gifFigure 4-2 DCK Package
6-Pin SC70
(Top View)
GUID-719BACD9-74DA-48B2-9A65-DF3BB16EB421-low.gifFigure 4-4 DEA Package
6-Pin X2SON
(Transparent Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
A 3 I/O Input or output A. This pin is referenced to VCCA. When this pin is configured as an input, do not leave it floating.
B 4 I/O Input or output B. This pin is referenced to VCCB. When this pin is configured as an input, do not leave it floating.
DIR 5 I Direction control signal. Set to Logic High for A-to-B level translation. Set to Logic Low for B-to-A level translation.
GND 2 — Ground.
VCCA 1 — A-port supply voltage. 0.65 V ≤ VCCA ≤ 3.6V.
VCCB 6 — B-port supply voltage. 0.65 V ≤ VCCB ≤ 3.6V.