JAJSFT3M December 1997 – July 2018 SN74CBTLV3257
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The 4-bit bus is connected directly to the 1A, 2A, 3A, and 4A ports (known as the xA port) on the SN74CBTLV3257, which essentially splits it into two busses, coming out of the xB1 and xB2 ports. When S is high, xB2 is the active bus, and when S is low, xB1 is the active bus. This means that Device 2 is connected to the bus controller when S is high, and Device 1 is connected to the bus controller when S is low. This setup is especially useful when two devices are hard coded with the same address and only one bus is available. The OE connection can be used to disconnect all devices from the bus controller if necessary.
The 0.1-µF capacitor on VCC is a decoupling capacitor and should be placed as close as possible to the device.