JAJSLL9C
June 2020 – December 2021
SN74HCS164-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Characteristics
6.7
Switching Characteristics
6.8
Operating Characteristics
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Balanced CMOS Push-Pull Outputs
8.3.2
CMOS Schmitt-Trigger Inputs
8.3.3
Clamp Diode Structure
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Power Considerations
9.2.1.2
Input Considerations
9.2.1.3
Output Considerations
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
サポート・リソース
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DYY|14
MPSS114C
PW|14
MPDS360A
BQA|14
MPQF538A
D|14
MPDS177H
サーマルパッド・メカニカル・データ
BQA|14
QFND686
発注情報
jajsll9c_oa
jajsll9c_pm
6.9
Typical Characteristics
T
A
= 25°C
Figure 6-1
Output Driver Resistance in LOW State
Figure 6-3
Supply Current Across Input Voltage, 2-, 2.5-, and 3.3-V Supply
Figure 6-2
Output Driver Resistance in HIGH State
Figure 6-4
Supply Current Across Input Voltage, 4.5-, 5-, and 6-V Supply