JAJSLL9C June   2020  – December 2021 SN74HCS164-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Operating Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS Push-Pull Outputs
      2. 8.3.2 CMOS Schmitt-Trigger Inputs
      3. 8.3.3 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

GUID-DED66B87-B175-4643-96BA-301B9E2E71AB-low.gifFigure 5-1 D, PW, or DYY Package
16-Pin SOIC, TSSOP or SOT
Top View
GUID-20201111-CA0I-ZGTX-DLMP-CGLC7R64RFDH-low.gifFigure 5-2 BQA Package
16-Pin WQFN
Top View
Table 5-1 Pin Functions
PIN TYPE(2) DESCRIPTION
NAME NO.
A 1 I Serial input A
B 2 I Serial input B
QA 3 O Parallel output A
QB 4 O Parallel output B
QC 5 O Parallel output C
QD 6 O Parallel output D
GND 7 — Ground
CLK 8 I Clock, rising edge triggered
CLR 9 I Clear 1 Active-Low
QE 10 O Parallel output E
QF 11 O Parallel output F
QG 12 O Parallel output G
QH 13 O Parallel output H
VCC 14 — Positive supply
Thermal Pad(1) — The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply.
(1) BQA Package only.
(2) I = input, O = output