JAJSIG2B January 2020 – January 2021 SN74HCS86
PRODUCTION DATA
In this application, a 2-input XOR gate is used as a phase difference detector as shown in Typical application block diagram. The remaining three gates can be used for other applications in the system, or the inputs can be grounded and the channels left unused.
The SN74HCS86 is used to identify phase difference between a reference clock and another input clock. Whenever the clock states are different, the XOR output will pulse HIGH until the clocks return to the same state. The output is fed into a low-pass filter to obtain a DC representation of the phase difference.
Typically, clock signals have fast transition rates, but additional filtering can be added to the clock signals which can lead to slower transitions rates. This makes the SN74HCS86 ideal for the application because it has Schmitt-trigger inputs that do not have input transition rate requirements.