SNx4LV123A Dual Retriggerable Monostable Multivibrators With Schmitt-Trigger Inputs
- SCLS393Q APRIL 1998 – August 2015 SN74LV123A
  
  UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.

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DATA SHEET

SNx4LV123A Dual Retriggerable Monostable Multivibrators With Schmitt-Trigger Inputs

1 Features

2-V to 5.5-V V_CC Operation
Maximum t_pd of 11 ns at 5 V
Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
> 2.3 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on
All Ports
Schmitt-Trigger Circuitry on A, B, and CLR Inputs for Slow Input Transition Rates
Edge Triggered From Active-High or
Active-Low Gated Logic Inputs
I_off Supports Partial-Power-Down Mode Operation
Retriggerable for Very Long Output Pulses,
up to 100% Duty Cycle
Overriding Clear Terminates Output Pulse
Glitch-Free Power-Up Reset on Outputs
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class 11
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

2 Applications

AV Receivers
Blu-ray Players and Home Theaters
DVD Recorders and Players
Desktop PCs or Notebook PCs
Digital Radio and Internet Radio Players
Digital Video Cameras (DVC)
Embedded PCs
GPS: Personal Navigation Devices
Mobile Internet Devices
Network Attached Storage (NAS)
Personal Digital Assistant (PDA)
Server PSU
Solid-State Drive (SSD): Client and Enterprise
Video Analytics Servers
Wireless Headsets, Keyboard, and Mice

3 Description

The 'LV123A devices are dual retriggerable monostable multivibrators designed for 2-V to 5.5-V V_CC operation.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
SN74LV123AD	SOIC (16)	6.00 mm x 9.90 mm
SN74LV123ADB	SSOP (16)	7.80 mm x 6.20 mm
SN74LV123ANS	SO (16)	7.80 mm x 10.20 mm
SN74LV123APW	TSSOP (16)	6.40 mm x 5.00 mm
SN74LV123ARGY	VQFN (16)	3.50 mm x 4.00 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram, Each Multivibrator (Positive Logic)

4 Revision History

Changes from P Revision (November 2013) to Q Revision

Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go

Changes from O Revision (April 1998) to P Revision

Updated document to new TI datasheet format - no specification changesGo
Removed Ordering Information table Go
Updated operating temperature range.Go

5 Description (continued)

These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.

The output pulse duration is programmable by selecting external resistance and capacitance values. The external timing capacitor must be connected between C_ext and R_ext/C_ext (positive) and an external resistor connected between R_ext/C_ext and V_CC. To obtain variable pulse durations, connect an external variable resistance between R_ext/C_ext and V_CC. The output pulse duration also can be reduced by taking CLR low.

6 Pin Configuration and Functions

D, DB, DGV, NS, or PW Package

16-Pin SOIC, SSOP, SO, TSSOP

Top View

RGY Package

16-Pin VQFN

Top View

Pin Functions

PIN		I/O	DESCRIPTION
NAME	NO.	I/O	DESCRIPTION
1A	1	I	Channel 1 falling edge trigger input when 1B = L; Hold low for other input methods
1B	2	I	Channel 1 rising edge trigger input when 1A = H; Hold high for other input methods
1CLR	3	I	Channel 1 rising edge trigger when 1A = H and 1B = L; Hold high for other input methods; Can cut pulse length short by driving low during output
1Q	4	O	Channel 1 inverted output
2Q	5	O	Channel 2 output
2C_ext	6	—	Channel 2 external capacitor negative connection
2R_ext/C_ext	7	—	Channel 2 external capacitor and resistor junction connection
GND	8	—	Ground
2A	9	I	Channel 2 falling edge trigger input when 2B = L; Hold low for other input methods
2B	10	I	Channel 2 rising edge trigger input when 2A = H; Hold high for other input methods
2CLR	11	I	Channel 2 rising edge trigger when 2A = H and 2B = L; Hold high for other input methods; Can cut pulse length short by driving low during output
2Q	12	O	Channel 2 inverted output
1Q	13	O	Channel 1 output
1C_ext	14	—	Channel 1 external capacitor negative connection
1R_ext/C_ext	15	—	Channel 1 external capacitor and resistor junction connection
V_CC	16	—	Power supply

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted)⁽¹⁾

			MIN	MAX	UNIT
V_CC	Supply voltage		–0.5	7	V
V_I	Input voltage⁽²⁾		–0.5	7	V
V_O	Voltage applied to any output in the high-impedance or power-off state⁽²⁾		–0.5	7	V
V_O	Output voltage in the high or low state⁽²⁾⁽³⁾		–0.5	V_CC + 0.5	V
V_O	Output voltage in power-off state⁽²⁾		–0.5	7	V
I_IK	Input clamp current	V_I < 0		–20	mA
I_OK	Output clamp current	V_O < 0		–50	mA
I_O	Continuous output current	V_O = 0 to V_CC		±25	mA
	Continuous current through V_CC or GND			±50	mA
T_j	Junction temperature			150	°C
T_stg	Storage temperature		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.

(3) The value is limited to 5.5 V maximum.

7.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

See ⁽¹⁾.

			SN54LV123A⁽²⁾			SN74LV123A			UNIT
			MIN	NOM	MAX	MIN	NOM	MAX	UNIT
V_CC	Supply voltage		2		5.5	2		5.5	V
V_IH	High-level input voltage	V_CC = 2 V	1.5			1.5			V
		V_CC = 2.3 V to 2.7 V	V_CC × 0.7			V_CC × 0.7
		V_CC = 3 V to 3.6 V	V_CC × 0.7			V_CC × 0.7
		V_CC = 4.5 V to 5.5 V	V_CC × 0.7			V_CC × 0.7
V_IL	Low-level input voltage	V_CC = 2 V			0.5			0.5	V
		V_CC = 2.3 V to 2.7 V			V_CC × 0.3			V_CC × 0.3
		V_CC = 3 V to 3.6 V			V_CC × 0.3			V_CC × 0.3
		V_CC = 4.5 V to 5.5 V			V_CC × 0.3			V_CC × 0.3
V_I	Input voltage		0		5.5	0		5.5	V
V_O	Output voltage		0		V_CC	0		V_CC	V
I_OH	High-level output current	V_CC = 2 V			–50			–50	µA
		V_CC = 2.3 V to 2.7 V			–2			–2	mA
		V_CC = 3 V to 3.6 V			–6			–6
		V_CC = 4.5 V to 5.5 V			–12			–12
I_OL	Low-level output current	V_CC = 2 V			50			50	µA
		V_CC = 2.3 V to 2.7 V			2			2	mA
		V_CC = 3 V to 3.6 V			6			6
		V_CC = 4.5 V to 5.5 V			12			12
R_ext	External timing resistance	V_CC = 2 V	5			5			kΩ
R_ext	External timing resistance	V_CC ≥ 3 V	1			1			kΩ
C_ext	External timing capacitance		No restriction			No restriction			pF
Δt/ΔV_CC	Power-up ramp rate		1			1			ms/V
T_A	Operating free-air temperature		–55		125	–40		125	°C

(1) All unused inputs of the device must be held at V_CC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004.

(2) Product Preview

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		SNx4LV123A						UNIT
		D (SOIC)	DB (SSOP)	DGV (TVSOP)	NS (SO)	PW (TSSOP)	RGY (VQFN)
		16 PINS	16 PINS	16 PINS	16 PINS	16 PINS	16 PINS
R_θJA	Junction-to-ambient thermal resistance	73	82	120	64	108	39	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS		V_CC	–55°C to 125°C SN54LV123A⁽²⁾			–40°C to 85°C SN74LV123A			Recommended –40°C to 125°C SN74LV123A			UNIT
PARAMETER		TEST CONDITIONS		V_CC	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
V_OH		I_OH = –50 µA		2 V to 5.5 V	V_CC – 0.1			V_CC – 0.1			V_CC – 0.1			V
		I_OH = –2 mA		2.3 V	2			2			2
		I_OH = –6 mA		3 V	2.48			2.48			2.48
		I_OH = –12 mA		4.5 V	3.8			3.8			3.8
V_OL		I_OL = 50 µA		2 V to 5.5 V			0.1			0.1			0.1	V
		I_OL = 2 mA		2.3 V			0.4			0.4			0.4
		I_OL = 6 mA		3 V			0.44			0.44			0.44
		I_OL = 12 mA		4.5 V			0.55			0.55			0.55
I_I	R_ext/C_ext⁽¹⁾	V_I = 5.5 V or GND		5.5 V			±2.5			±2.5			±25	µA
	A, B, and CLR	V_I = 5.5 V or GND		0 V			±1			±1			±1
	A, B, and CLR	V_I = 5.5 V or GND		0 to 5.5 V			±1			±1			±1
I_CC	Quiescent	V_I = V_CC or GND,	I_O = 0	5.5 V			20			20			20	µA
I_CC	Active state (per circuit)	V_I = V_CC or GND, R_ext/C_ext = 0.5 V_CC		3 V			280			280			280	µA
				4.5 V			650			650			650
				5.5 V			975			975			975
I_off		V_I or V_O = 0 to 5.5 V		0 V						5			5	µA
C_i		V_I = V_CC or GND		3.3 V		1.9			1.9			1.9		pF
C_i		V_I = V_CC or GND		5 V		1.9			1.9			1.9		pF

(1) This test is performed with the terminal in the off-state condition.

(2) Product Preview

7.6 Timing Requirements, V_CC= 2.5 V ± 0.2 V

over recommended operating free-air temperature range, V_CC= 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 5)

PARAMETER			TEST CONDITIONS		T_A = 25°C			–55°C to 125°C SN54LV123A⁽²⁾			–40°C to 85°C SN74LV123A			–40°C to 125°C SN74LV123A			UNIT
PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
t_w	Pulse duration	CLR			6			6.5			6.5			6.5			ns
t_w	Pulse duration	A or B trigger			6			6.5			6.5			6.5			ns
t_rr	Pulse retrigger time		R_ext = 1 kΩ	C_ext = 100 pF	See⁽¹⁾	94		See⁽¹⁾			See⁽¹⁾			See⁽¹⁾			ns
t_rr	Pulse retrigger time		R_ext = 1 kΩ	C_ext = 0.01 µF	See⁽¹⁾	2		See⁽¹⁾			See⁽¹⁾			See⁽¹⁾			µs

(1) See retriggering data in the Application Information section.

(2) Product Preview

7.7 Timing Requirements, V_CC= 3.3 V ± 0.3 V

over recommended operating free-air temperature range, V_CC= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 5)

PARAMETER			TEST CONDITIONS		T_A = 25°C			–55°C to 125°C SN54LV123A⁽²⁾			–40°C to 85°C SN74LV123A			–40°C to 125°C SN74LV123A			UNIT
PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
t_w	Pulse duration	CLR			5			5			5			5			ns
t_w	Pulse duration	A or B trigger			5			5			5			5			ns
t_rr	Pulse retrigger time		R_ext = 1 kΩ	C_ext = 100 pF	See⁽¹⁾	76		See⁽¹⁾			See⁽¹⁾			See⁽¹⁾			ns
t_rr	Pulse retrigger time		R_ext = 1 kΩ	C_ext = 0.01 µF	See⁽¹⁾	1.8		See⁽¹⁾			See⁽¹⁾			See⁽¹⁾			µs

(1) See retriggering data in the Application Information section.

(2) Product Preview

7.8 Timing Requirements, V_CC= 5 V ± 0.5 V

over recommended operating free-air temperature range, V_CC= 5 V ± 0.5 V (unless otherwise noted) (see Figure 5)

PARAMETER			TEST CONDITIONS		T_A = 25°C			–55°C to 125°C SN54LV123A⁽²⁾			–40°C to 85°C SN74LV123A			–40°C to 125°C SN74LV123A			UNIT
PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
t_w	Pulse duration	CLR			5			5			5			5			ns
t_w	Pulse duration	A or B trigger			5			5			5			5			ns
t_rr	Pulse retrigger time		R_ext = 1 kΩ	C_ext = 100 pF	See⁽¹⁾	59		See⁽¹⁾			See⁽¹⁾			See⁽¹⁾			ns
t_rr	Pulse retrigger time		R_ext = 1 kΩ	C_ext = 0.01 µF	See⁽¹⁾	1.5		See⁽¹⁾			See⁽¹⁾			See⁽¹⁾			µs

(1) See retriggering data in the Application Information section.

(2) Product Preview

7.9 Switching Characteristics, V_CC = 2.5 V ± 0.2 V

over recommended operating free-air temperature range, V_CC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 5)

PARAMETER	FROM (INPUT)	TO (OUTPUT)	TEST CONDITIONS	T_A = 25°C			–55°C to 125°C SN54LV123A⁽⁴⁾			–40°C to 85°C SN74LV123A			–40°C to 125°C SN74LV123A			UNIT
PARAMETER	FROM (INPUT)	TO (OUTPUT)	TEST CONDITIONS	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
t_pd	A or B	Q or Q	C_L = 15 pF		14.5	31.4⁽¹⁾	1⁽¹⁾		37⁽¹⁾	1		37	1		37	ns
	CLR	Q or Q			13	25⁽¹⁾	1⁽¹⁾		29.5⁽¹⁾	1		29.5	1		29.5
	CLR trigger	Q or Q			15.1	33.4⁽¹⁾	1⁽¹⁾		39⁽¹⁾	1		39	1		39
t_pd	A or B	Q or Q	C_L = 50 pF		16.6	36	1		42	1		42	1		42	ns
	CLR	Q or Q			14.7	32.8	1		34.5	1		34.5	1		34.5
	CLR trigger	Q or Q			17.4	38	1		44	1		44	1		44
t_w⁽²⁾		Q or Q	C_L = 50 pF C_ext = 28 pF R_ext = 2 kΩ		197	260			320			320			320	ns
			C_L = 50 pF C_ext = 0.01 µF R_ext = 10 kΩ	90	100	110	90		110	90		110	90		110	µs
			C_L = 50 pF C_ext = 0.1 µF R_ext = 10 kΩ	0.9	1	1.1	0.9		1.1	0.9		1.1	0.9		1.1	ms
Δt_w⁽³⁾			C_L = 50 pF		±1%

(1) On products compliant to MIL-PRF-38535, this parameter is not production tested.

(2) t_w = Duration of pulse at Q and Q outputs

(3) Δt_w = Output pulse-duration variation (Q and Q) between circuits in same package

(4) Product Preview

7.10 Switching Characteristics, V_CC = 3.3 V ± 0.3 V

over recommended operating free-air temperature range, V_CC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 5)

PARAMETER	FROM (INPUT)	TO (OUTPUT)	TEST CONDITIONS	T_A = 25°C			–55°C to 125°C SN54LV123A⁽⁴⁾			–40°C to 85°C SN74LV123A			–40°C to 125°C SN74LV123A			UNIT
PARAMETER	FROM (INPUT)	TO (OUTPUT)	TEST CONDITIONS	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
t_pd	A or B	Q or Q	C_L = 15 pF		10.2	20.6⁽¹⁾	1⁽¹⁾		24⁽¹⁾	1		24	1		24	ns
	CLR	Q or Q			9.3	15.8⁽¹⁾	1⁽¹⁾		18.5⁽¹⁾	1		18.5	1		18.5
	CLR trigger	Q or Q			10.6	22.4⁽¹⁾	1⁽¹⁾		26⁽¹⁾	1		26	1		26
t_pd	A or B	Q or Q	C_L = 50 pF		11.8	24.1	1		27.5	1		27.5	1		27.5	ns
	CLR	Q or Q			10.5	19.3	1		22	1		22	1		22
	CLR trigger	Q or Q			12.3	25.9	1		29.5	1		29.5	1		29.5
t_w⁽²⁾		Q or Q	C_L = 50 pF C_ext = 28 pF R_ext = 2 kΩ		182	240			300			300			300	ns
			C_L = 50 pF C_ext = 0.01 µF R_ext = 10 kΩ	90	100	110	90		110	90		110	90		110	µs
			C_L = 50 pF C_ext = 0.1 µF R_ext = 10 kΩ	0.9	1	1.1	0.9		1.1	0.9		1.1	0.9		1.1	ms
Δt_w⁽³⁾			C_L = 50 pF		±1%

(1) On products compliant to MIL-PRF-38535, this parameter is not production tested.

(2) t_w = Duration of pulse at Q and Q outputs

(3) Δt_w = Output pulse-duration variation (Q and Q) between circuits in same package

(4) Product Preview

7.11 Switching Characteristics, V_CC = 5 V ± 0.5 V

over recommended operating free-air temperature range, V_CC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 5)

PARAMETER	FROM (INPUT)	TO (OUTPUT)	TEST CONDITIONS	T_A = 25°C			–55°C to 125°C SN54LV123A⁽⁴⁾			–40°C to 85°C SN74LV123A			–40°C to 125°C SN74LV123A			UNIT
PARAMETER	FROM (INPUT)	TO (OUTPUT)	TEST CONDITIONS	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
t_pd	A or B	Q or Q	C_L = 15 pF		7.1	12⁽¹⁾	1⁽¹⁾		14⁽¹⁾	1		14	1		14	ns
	CLR	Q or Q			6.5	9.4⁽¹⁾	1⁽¹⁾		11⁽¹⁾	1		11	1		11
	CLR trigger	Q or Q			7.4	12.9⁽¹⁾	1⁽¹⁾		15⁽¹⁾	1		15	1		15
t_pd	A or B	Q or Q	C_L = 50 pF		8.3	14	1		16	1		16	1		16	ns
	CLR	Q or Q			7.4	11.4	1		13	1		13	1		13
	CLR trigger	Q or Q			8.7	14.9	1		17	1		17	1		17
t_w⁽²⁾		Q or Q	C_L = 50 pF C_ext = 28 pF R_ext = 2 kΩ		167	200			240			240			240	ns
			C_L = 50 pF C_ext = 0.01 µF R_ext = 10 kΩ	90	100	110	90		110	90		110	90		110	µs
			C_L = 50 pF C_ext = 0.1 µF R_ext = 10 kΩ	0.9	1	1.1	0.9		1.1	0.9		1.1	0.9		1.1	ms
Δt_w⁽³⁾			C_L = 50 pF		±1%

(1) On products compliant to MIL-PRF-38535, this parameter is not production tested.

(2) t_w = Duration of pulse at Q and Q outputs

(3) Δt_w = Output pulse-duration variation (Q and Q) between circuits in same package

(4) Product Preview

7.12 Operating Characteristics

T_A = 25°C

PARAMETER		TEST CONDITIONS		V_CC	TYP	UNIT
C_pd	Power dissipation capacitance	C_L = 50 pF,	f = 10 MHz	3.3 V	44	pF
C_pd	Power dissipation capacitance	C_L = 50 pF,	f = 10 MHz	5 V	49	pF

7.13 Typical Characteristics

Operation of the devices at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied.

Figure 1. Minimum Trigger vs V_CC Characteristics

Figure 3. External Capacitance vs Multiplier Factor

Figure 2. Output Pulse-Duration Constant vs Supply Voltage

Figure 4. Distribution of Units vs Output Pulse Duration