JAJSOT4E
December 2013 – February 2024
SN74LV1T34
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Related Products
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Operating Characteristics
6.8
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Clamp Diode Structure
8.3.2
Balanced CMOS Push-Pull Outputs
8.3.3
LVxT Enhanced Input Voltage
8.3.3.1
Down Translation
8.3.3.2
Up Translation
8.4
Device Functional Modes
9
Application and Implementation
9.1
Power Supply Recommendations
9.2
Layout
9.2.1
Layout Guidelines
10
Device and Documentation Support
10.1
Documentation Support (Analog)
10.1.1
Related Documentation
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
用語集
11
Revision History
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DCK|5
MPDS025I
DBV|5
MPDS018S
サーマルパッド・メカニカル・データ
発注情報
jajsot4e_oa
jajsot4e_pm
6.8
Typical Characteristics
Figure 6-1
Switching Characteristics at 50 MHz Excellent Signal Integrity
Figure 6-3
Switching Characteristics at 15 MHz Excellent Signal Integrity
Figure 6-2
Switching Characteristics at 50 MHz Excellent Signal Integrity