JAJSOT9C February 2014 – June 2022 SN74LV4T125
PRODUCTION DATA
| DEVICE | PACKAGE | DESCRIPTION |
|---|---|---|
| SN74LV1T00 | DCK, DBV | 2‐Input Positive‐NAND Gate |
| SN74LV1T02 | DCK, DBV | 2‐Input Positive‐NOR Gate |
| SN74LV1T04 | DCK, DBV | Inverter Gate |
| SN74LV1T08 | DCK, DBV | 2‐Input Positive‐AND Gate |
| SN74LV1T34 | DCK, DBV, DRL | Single Buffer Gate |
| SN74LV1T14 | DCK, DBV | Single Schmitt‐Trigger Inverter Gate |
| SN74LV1T32 | DCK, DBV | 2‐Input Positive‐OR Gate |
| SN74LV1T86 | DCK, DBV | Single 2‐Input Exclusive‐Or Gate |
| SN74LV1T125 | DCK, DBV, DRL | Single Buffer Gate with 3‐state Output |
| SN74LV1T126 | DCK, DBV, DRL | Single Buffer Gate with 3‐state Output |
| SN74LV4T125 | RGY, PW | Quadruple Bus Buffer Gate With 3‐State Outputs |