JAJSKA9M
January 2003 – August 2022
SN74LVC1G3157
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Analog Switch Characteristics
6.7
Switching Characteristics 85°C
6.8
Switching Characteristics 125°C
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
サポート・リソース
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DRY|6
MPDS221F
DSF|6
MPDS301G
YZP|6
MXBG347
DTB|6
MPSS095B
DCK|6
MPDS114E
DRL|6
MPDS159H
DBV|6
MPDS026Q
サーマルパッド・メカニカル・データ
DRY|6
QFND138E
発注情報
jajska9m_oa
jajska9m_pm
7
Parameter Measurement Information
Figure 7-1
ON-State Resistance Test Circuit
Figure 7-2
OFF-State Switch Leakage-Current Test Circuit
Figure 7-3
ON-State Switch Leakage-Current Test Circuit
Figure 7-4
Load Circuit and Voltage Waveforms
Figure 7-5
Frequency Response (Switch On)
Figure 7-6
Crosstalk (Between Switches)
Figure 7-7
Feed Through
Figure 7-8
Charge-Injection Test
Figure 7-9
Total Harmonic Distortion
Figure 7-10
Break-Before-Make Internal Timing