SCES222Q
April 1999 – June 2017
SN74LVC1G86
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics, CL = 15 pF
6.7
Switching Characteristics, CL = 30 pF or 50 pF
6.8
Operating Characteristics
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Balanced High-Drive CMOS Push-Pull Outputs
8.3.2
Standard CMOS Inputs
8.3.3
Clamp Diodes
8.3.4
Partial Power Down (Ioff)
8.3.5
Over-voltage Tolerant Inputs
8.4
Function Table
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
DBV|5
DCK|5
DRL|5
YZP|5
サーマルパッド・メカニカル・データ
発注情報
sces222q_oa
sces222q_pm
7
Parameter Measurement Information
Figure 2.
Load Circuit and Voltage Waveforms