SCES359J August   2001  – October 2015 SN74LVC2G34

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Documentation Support
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DBV|6
  • DRL|6
  • YZP|6
  • DCK|6
サーマルパッド・メカニカル・データ
発注情報

9 Application and Implementation

9.1 Application Information

The SN74LVC2G34 is a high-drive CMOS device that can be used as a buffer with a high output drive, such as an LED application. It can produce 24 mA of drive current at 3.3 V, making it ideal for driving multiple outputs and good for high-speed applications up to 100 MHz. The inputs are 5.5-V tolerant allowing it to translate down to VCC.

9.2 Typical Application

SN74LVC2G34 SCES359_typapp.gif Figure 3. Typical Application

9.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads so routing and load conditions must be considered to prevent ringing.

9.2.2 Detailed Design Procedure

  1. Recommended Input Conditions
    • Rise time and fall time specs. See (Δt/ΔV) in the table.
    • Specified high and low levels. See (VIH and VIL) in the table.
    • Inputs are overvoltage tolerant allowing them to go as high as (VI max) in the table at any valid VCC.
  2. Recommended Output Conditions
    • Load currents must not exceed (IO max) per output and must not exceed (Continuous current through VCC or GND) total current for the part. These limits are located in the Recommended Operating Conditions table.
    • Outputs much not be pulled above VCC under normal operating conditions.

9.2.3 Application Curve

SN74LVC2G34 D002_SCES519.gif Figure 4. TPD Across VCC at 25°C