JAJSP71N December   2003  – June 2024 SN74LVC2T45

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics: VCCA = 1.8V ± 0.15V
    7. 5.7  Switching Characteristics: VCCA = 2.5V ± 0.2V
    8. 5.8  Switching Characteristics: VCCA = 3.3V ± 0.3V
    9. 5.9  Switching Characteristics: VCCA = 5V ± 0.5V
    10. 5.10 Operating Characteristics
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65V to 5.5V Power-Supply Range
      2. 7.3.2 Support High-Speed Translation
      3. 7.3.3 Ioff Supports Partial-Power-Down Mode Operation
      4. 7.3.4 Balanced High-Drive CMOS Push-Pull Outputs
      5. 7.3.5 Glitch-Free Power Supply Sequencing
      6. 7.3.6 Vcc Isolation
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Logic Level-Shifting Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Logic Level-Shifting Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Enable Times
        3. 8.2.2.3 Application Curve
    3.     42
    4. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-Up Consideration
    5. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DCU|8
  • YZP|8
  • DCT|8
サーマルパッド・メカニカル・データ
発注情報

5.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)12
PARAMETER TEST CONDITIONS VCCA VCCB TA = 25°C –40°C to +85°C UNIT
MIN TYP MAX MIN MAX
VOH IOH = –100μA VI = VIH 1.65V to 4.5V 1.65V to 4.5V VCCO – 0.1 V
IOH = –4mA 1.65V 1.65V 1.2
IOH = –8mA 2.3V 2.3V 1.9
IOH = –24mA 3V 3V 2.4
IOH = –32mA 4.5V 4.5V 3.8
VOL IOL = 100μA VI = VIL 1.65V to 4.5V 1.65V to 4.5V 0.1 V
IOL = 4mA 1.65V 1.65V 0.45
IOL = 8mA 2.3V 2.3V 0.3
IOL = 24mA 3V 3V 0.55
IOL = 32mA 4.5V 4.5V 0.55
II DIR VI = VCCA or GND 1.65V to 5.5V 1.65V to 5.5V ±1 ±2 µA
Ioff A port VI or VO = 0 to 5.5V 0V 0 to 5.5V ±1 ±2 µA
B port 0 to 5.5V 0V ±1 ±2
IOZ A or B port VO = VCCO or GND 1.65V to 5.5V 1.65V to 5.5V ±1 ±2 µA
ICCA VI = VCCI or GND, IO = 0 1.65V to 5.5V 1.65V to 5.5V

3

 µA
5V 0V 2
0V 5V –2
ICCB VI = VCCI or GND, IO = 0 1.65V to 5.5V 1.65V to 5.5V

3

 µA
5V 0V –2
0V 5V 2
ICCA + ICCB
(see Table 8-4)		 VI = VCCI or GND, IO = 0 1.65V to 5.5V 1.65V to 5.5V 4 µA
ΔICCA A port One A port at VCCA – 0.6V,
DIR at VCCA,
B port = open		 3V to 5.5V 3V to 5.5V 50 µA
DIR DIR at VCCA – 0.6V,
B port = open,
A port at VCCA or GND		 50
ΔICCB B port One B port at VCCB – 0.6V,
DIR at GND, A port = open		 3V to 5.5V 3V to 5.5V 50 µA
CI DIR VI = VCCA or GND 3.3V 3.3V 2.5 pF
Cio A or B port VO = VCCA/B or GND 3.3V 3.3V 6 pF
(1) VCCO is the VCC associated with the output port.
(2) VCCI is the VCC associated with the input port.