JAJSTR0A March 2024 – May 2024 SN74LVC3G98
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
A1 | 1 | I | Channel 1, Input A |
B1 | 2 | I | Channel 1, Input B |
A2 | 3 | I | Channel 2, Input A |
B2 | 4 | I | Channel 2, Input B |
A3 | 5 | I | Channel 3, Input A |
B3 | 6 | I | Channel 3, Input B |
GND | 7 | G | Ground |
Y3 | 8 | O | Channel 3, output Y |
C3 | 9 | I | Channel 3, Input C |
Y2 | 10 | O | Channel 2, Output Y |
C2 | 11 | I | Channel 2, Input C |
Y1 | 12 | O | Channel 1, Output Y |
C1 | 13 | I | Channel 1, Input C |
VCC | 14 | P | Positive supply |
Thermal Pad(2) | — | The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply |