JAJST35V January   1993  – May 2024 SN54LVC74A , SN74LVC74A

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information: SN74LVC74A
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements: SN54LVC74A
    7. 5.7  Timing Requirements: SN74LVC74A
    8. 5.8  Timing Requirements: SN74LVC74A, –40°C to 125°C and –40°C to 85°C
    9. 5.9  Switching Characteristics: SN54LVC74A
    10. 5.10 Switching Characteristics: SN74LVC74A
    11. 5.11 Switching Characteristics: SN74LVC74A, –40°C to 125°C and –40°C to 85°C
    12. 5.12 Operating Characteristics
    13. 5.13 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|14
  • RGY|14
  • DB|14
  • PW|14
  • BQA|14
  • NS|14
サーマルパッド・メカニカル・データ
発注情報

5.6 Timing Requirements: SN54LVC74A

over recommended operating free-air temperature range (unless otherwise noted; see Parameter Measurement Information)
MINMAXUNIT
fclockClock frequencyVCC = 2.7 V83MHz
VCC = 3.3 V ± 0.3 V100
twPulse durationPRE or CLR low3.3ns
CLK high or low3.3
tsuSetup time before CLK↑DataVCC = 2.7 V3.4ns
VCC = 3.3 V ± 0.3 V3
PRE or CLR inactiveVCC = 2.7 V2.2
VCC = 3.3 V ± 0.3 V2
thHold time, data after CLK↑1ns