JAJSPH6A
september 2010 – december 2022
SN74LVC8T245-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics, VCCA = 1.8 V ± 0.15 V
6.7
Switching Characteristics, VCCA = 2.5 V ± 0.2 V
6.8
Switching Characteristics, VCCA = 3.3 V ± 0.3 V
6.9
Switching Characteristics, VCCA = 5 V ± 0.5 V
6.10
Operating Characteristics
6.11
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
8.3.2
Ioff Supports Partial-Power-Down Mode Operation
8.3.3
Balanced High-Drive CMOS Push-Pull Outputs
8.3.4
Vcc Isolation
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
ドキュメントの更新通知を受け取る方法
12.2
サポート・リソース
12.3
Trademarks
12.4
静電気放電に関する注意事項
12.5
用語集
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PW|24
MPDS363A
サーマルパッド・メカニカル・データ
発注情報
jajsph6a_oa
jajsph6a_pm
8
Detailed Description