JAJSPH6A september   2010  – december 2022 SN74LVC8T245-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCCA = 1.8 V ± 0.15 V
    7. 6.7  Switching Characteristics, VCCA = 2.5 V ± 0.2 V
    8. 6.8  Switching Characteristics, VCCA = 3.3 V ± 0.3 V
    9. 6.9  Switching Characteristics, VCCA = 5 V ± 0.5 V
    10. 6.10 Operating Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
      2. 8.3.2 Ioff Supports Partial-Power-Down Mode Operation
      3. 8.3.3 Balanced High-Drive CMOS Push-Pull Outputs
      4. 8.3.4 Vcc Isolation
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3 Recommended Operating Conditions

(1)(2)(3)(4)(5)(6)
VCCIVCCOMINMAXUNIT
VCCASupply voltage1.655.5V
VCCB1.655.5
VIHHigh-level
input voltage		Data inputs(5)1.65 V to 1.95 VVCCI  × 0.65V
2.3 V to 2.7 V1.7
3 V to 3.6 V2
4.5 V to 5.5 VVCCI  × 0.7
VILLow-level
input voltage		Data inputs(5)1.65 V to 1.95 VVCCI  × 0.35V
2.3 V to 2.7 V0.7
3 V to 3.6 V0.8
4.5 V to 5.5 VVCCI  × 0.3
VIHHigh-level
input voltage		Control inputs
(referenced to VCCA)(6)		1.65 V to 1.95 VVCCA  × 0.65V
2.3 V to 2.7 V1.7
3 V to 3.6 V2
4.5 V to 5.5 VVCCA  × 0.7
VILLow-level
input voltage		Control inputs
(referenced to VCCA)(6)		1.65 V to 1.95 VVCCA  × 0.35V
2.3 V to 2.7 V0.7
3 V to 3.6 V0.8
4.5 V to 5.5 VVCCA  × 0.3
VIInput voltageControl inputs05.5V
VI/OInput/output
voltage		Active state0VCCOV
3-State05.5V
IOHHigh-level output current1.65 V to 1.95 V–4mA
2.3 V to 2.7 V–8
3 V to 3.6 V–24
4.5 V to 5.5 V–32
IOLLow-level output current1.65 V to 1.95 V4mA
2.3 V to 2.7 V8
3 V to 3.6 V24
4.5 V to 5.5 V32
Δt/Δv7Input transition
rise or fall rate		Data inputs1.65 V to 1.95 V20ns/V
2.3 V to 2.7 V20
3 V to 3.6 V10
4.5 V to 5.5 V5
TAOperating free-air temperature–40125°C
(1) VCCI is the VCC associated with the data input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused or driven (floating) data inputs (I/Os) of the device must be held at logic HIGH or LOW (preferably VCCI or GND) to ensure proper device operation and minimize power. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(4) All unused control inputs must be held at VCCA or GND to ensure proper device operation and minimize power comsumption.
(5) For VCCI values not specified in the data sheet, VIH min = VCCI  × 0.7 V, VIL max = VCCI  × 0.3 V.
(6) For VCCA values not specified in the data sheet, VIH min = VCCA  × 0.7 V, VIL max = VCCA  × 0.3 V.
(7) Maximum input transition rate with < 4 channels switching simultaneously.