JAJSPG5Q November   1996  – December 2022 SN74LVCC3245A

PRODMIX  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 A Port (VCCA = 2.5 V ± 0.2 V and VCCB = 3.3 V ± 0.3 V)
    2. 7.2 B Port (VCCA = 2.5 V ± 0.2 V and VCCB = 3.3 V ± 0.3 V)
    3. 7.3 B Port (VCCA = 3.6 V and VCCB = 5.5 V)
    4. 7.4 A and B Port (VCCA and VCCB = 3.6 V)
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1.      Application and Implementation
        1. 9.1 Application Information
        2. 9.2 Typical Application
          1. 9.2.1 Design Requirements
          2. 9.2.2 Detailed Design Procedure
          3. 9.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power-Up Considerations
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DBQ|24
  • NS|24
  • DW|24
  • DB|24
  • PW|24
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

When using multiple bit logic devices inputs should not ever float. In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified below are the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC whichever make more sense or is more convenient.