JAJSPI3N November   1996  – December 2022 SN74LVCC4245A

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Power-Up Consideration
  8. 8 Parameter Measurement Information For A to B VCCA = 4.5 V to 5.5 V and VCCB = 2.7 V to 3.6 V
  9. 9 Parameter Measurement Information For A to B VCCA = 4.5 V to 5.5 V and VCCB = 3.6 V to 5.5 V
  10. 10Parameter Measurement Information For B to A VCCA = 4.5 V to 5.5 V and VCCB = 2.7 V to 3.6 V
  11. 11Parameter Measurement Information For B to A VCCA = 4.5 V to 5.5 V and VCCB = 3.6 V to 5.5 V
  12. 12Detailed Description
    1. 12.1 Overview
    2. 12.2 Functional Block Diagram
    3. 12.3 Feature Description
    4. 12.4 Device Functional Modes
  13. 13Application and Implementation
    1. 13.1 Application Information
    2. 13.2 Typical Application
      1. 13.2.1 Design Requirements
      2. 13.2.2 Detailed Design Procedure
      3. 13.2.3 Application Curves
  14. 14Power Supply Recommendations
  15. 15Layout
    1. 15.1 Layout Guidelines
    2. 15.2 Layout Example
  16. 16Device and Documentation Support
    1. 16.1 Documentation Support
      1. 16.1.1 Related Documentation
    2. 16.2 ドキュメントの更新通知を受け取る方法
    3. 16.3 サポート・リソース
    4. 16.4 Trademarks
    5. 16.5 静電気放電に関する注意事項
    6. 16.6 用語集
  17. 17Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • NS|24
  • DW|24
  • DB|24
  • PW|24
サーマルパッド・メカニカル・データ
発注情報

12.1 Overview

SN74LVCC4245A is an 8-bit (octal) noninverting bus transceiver contains two separate supply rails; B port has VCCB, which is set at 3.3 V, and A port has VCCA, which is set at 5 V. This allows for translation from a 3.3-V to a 5-V environment, and vice versa, designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. The control circuitry (DIR, OE) is powered by VCCA.