SCES635B JULY   2005  – April 2015 SN74LVCH16T245

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics for VCCA = 1.8 V ±0.15 V
    7. 7.7  Switching Characteristics for VCCA = 2.5 V ±0.2 V
    8. 7.8  Switching Characteristics for VCCA = 3.3 V ±0.3 V
    9. 7.9  Switching Characteristics for VCCA = 5 V ±0.5 V
    10. 7.10 Operating Characteristics
    11. 7.11 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
      2. 9.3.2 Support High-Speed Translation
      3. 9.3.3 Partial-Power-Down Mode Operation
      4. 9.3.4 VCC Isolation
      5. 9.3.5 Bus Hold on Data Inputs
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Enable Times
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

13 Device and Documentation Support

13.1 Documentation Support

13.1.1 Related Documentation

For related documentation see the following:

  • CMOS Power Consumption and Cpd Calculation, SCAA035
  • Implications of Slow or Floating CMOS Inputs, SCBA004

13.2 Trademarks

All other trademarks are the property of their respective owners.

13.3 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

13.4 Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.