SCAS582Q November   1996  – October 2014 SN74LVCHR16245A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DGG|48
  • DL|48
  • DGV|48
サーマルパッド・メカニカル・データ
発注情報

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The SN74LVCHR16245A device is a 16-bit bidirectional transceiver. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The device has 5.5-V tolerant inputs at any valid VCC which allows the device to be used in multi-power systems and used for down translation. All outputs have equivalent 26-Ω series resistors, so no external resistors are required. The Bus Hold feature eliminates the need for external pullup or pulldown resistors on unused or floating inputs.

8.2 Typical Application

app_sche_cas582.gifFigure 5. Typical Application Schematic

8.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads, so routing and load conditions should be considered to prevent ringing.

8.2.2 Detailed Design Procedure

  1. Recommended Input Conditions:
  2. Recommend Output Conditions:
    • Load currents should not exceed 50 mA per output and 100 mA total for the part.
    • Outputs should not be pulled above VCC.

8.2.3 Application Curves

D003_SCAS582.gifFigure 6. ICC vs Frequency