SDLS144D April   1985  – October 2016 SN54LS240 , SN54LS241 , SN54LS244 , SN54S240 , SN54S241 , SN54S244 , SN74LS240 , SN74LS241 , SN74LS244 , SN74S240 , SN74S241 , SN74S244

 

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - SNx4LS24x
    6. 6.6 Electrical Characteristics - SNx4S24x
    7. 6.7 Switching Characteristics - SNx4LS24x
    8. 6.8 Switching Characteristics - SNx4S24x
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 SN54LS24x and SN74LS24x Devices
    2. 7.2 SN54S24x and SN74S24x Devices
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 3-State Outputs
      2. 8.3.2 PNP Inputs
      3. 8.3.3 Hysteresis on Bus Inputs
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resource
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage, VCC(2) 7 V
Input voltage, VI SNx4LS24x 7 V
SNx4S24x 5.5
Off-state output voltage 5.5 V
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltage values are with respect to network ground terminal.

6.2 ESD Ratings

VALUE UNIT
ALL PACKAGES
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 500 V
N PACKAGE
V(ESD) Electrostatic discharge Charged device model (CDM), per JEDEC specification JESD22-C101(2) 500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCC Supply voltage(1) SN54xS24x 4.5 5 5.5 V
SN74xS24x 4.75 5 5.25
VIH High-level input voltage 2 V
VIL Low-level input voltage SN54LS24x 0.7 V
SN54S24x, SN74xS24x 0.8
IOH High-level output current SN54xS24x –12 mA
SN74xS24x –15
IOL Low-level output current SN54LS24x 12 mA
SN54S24x 48
SN74LS24x 24
SN74S24x 64
External resistance between any input and VCC or ground (SNx4S24x only) 40 kΩ
TA Operating free-air temperature(2) SN54xS24x –55 125 °C
SN74xS24x 0 70
(1) Voltage values are with respect to network ground terminal.
(2) An SN54S241J operating at free-air temperature above 116°C requires a heat sink that provides a thermal resistance from case to free air, RθCA, of not more that 40°C/W.

6.4 Thermal Information

THERMAL METRIC(1) SN74LS240,
SN74LS244		 SN74LS24x, SN74S24x SN74LS24x UNIT
DB (SSOP) DW (SOIC) N (PDIP) NS (SOP)
20 PINS 20 PINS 20 PINS 20 PINS
RθJA Junction-to-ambient thermal resistance(2)(3) 94.3 90.3 50.6 76.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 55.9 45.5 37.4 42.9 °C/W
RθJB Junction-to-board thermal resistance 49.5 48.1 31.5 44.1 °C/W
ψJT Junction-to-top characterization parameter 21.3 19.4 24 19.2 °C/W
ψJB Junction-to-board characterization parameter 49.1 47.6 31.4 43.7 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) Voltage values are with respect to network ground terminal.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.

6.5 Electrical Characteristics – SNx4LS24x

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS(1) MIN TYP(2) MAX UNIT
VIK VCC = MIN, II = –18 mA –1.5 V
Hysteresis
(VT+ − VT−)		 VCC = MIN 0.2 0.4 V
VOH VCC = MIN, IOH = –3 mA, VIH = 2 V, VIL = MAX 2.4 3.4 V
VCC = MIN, IOH = MAX, VIH = 2 V, VIL = 0.5 V 2
VOL VCC = MIN, VIL = MAX, VIH = 2 V IOL = 12 mA, SN54LS24x 0.4 V
IOL = 24 mA, SN74LS24x 0.5
IOZH VCC = MAX, VIL = MAX, VIH = 2 V, VO = 2.7 V 20 µA
IOZL VCC = MAX, VIL = MAX, VIH = 2 V, VO = 0.4 V –20 µA
II VCC = MAX, VI = 7 V 0.1 mA
IIH VCC = MAX, VI = 2.7 V 20 µA
IIL VCC = MAX, VIL = 0.4 V –0.2 mA
IOS(3) VCC = MAX –40 –225 mA
ICC VCC = MAX, output open Outputs high All 17 27 mA
Outputs low SNx4LS240 26 44
SNx4LS241, SNx4LS244 27 46
Outputs disabled SNx4LS240 29 50
SNx4LS241, SNx4LS244 32 54
(1) For conditions shown as minimum or maximum, use the appropriate value specified under recommended operating conditions.
(2) All typical values are at VCC = 5 V and TA = 25°C.
(3) Not more than one output must be shorted at a time, and duration of the short-circuit must not exceed one second.

6.6 Electrical Characteristics – SNx4S24x

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS(1) MIN TYP(2) MAX UNIT
VIK VCC = MIN, II = –18 mA –1.2 V
Hysteresis
(VT+ − VT−)		 VCC = MIN 0.2 0.4 V
VOH VCC = MIN, IOH = –1 mA, VIH = 2 V, VIL = 0.8 V, SN74S24x only 2.7 V
VCC = MIN, IOH = –3 mA, VIH = 2 V, VIL = 0.8 V 2.4 3.4
VCC = MIN, IOH = MAX, VIH = 2 V, VIL = 0.5 V 2
VOL VCC = MIN, VIL = MAX, VIH = 2 V, IOL = 0.8 V 0.55 V
IOZH VCC = MAX, VIL = 0.8 V, VIH = 2 V, VO = 2.4 V 50 µA
IOZL VCC = MAX, VIL = MAX, VIH = 2 V, VO = 0.5 V –50 µA
II VCC = MAX, VI = 5.5 V 1 mA
IIH VCC = MAX, VI = 2.7 V 50 µA
IIL VCC = MAX, VIL = 0.5 V Any A –400 µA
Any G –2 mA
IOS(3) VCC = MAX –50 –225 mA
ICC VCC = MAX, output open Outputs high SN54S240 80 123 mA
SN74S240 80 135
SN54S241, SN54S244 95 147
SN74S241, SN74S244 95 160
Outputs low SN54S240 100 145
SN74S240 100 150
SN54S241, SN54S244 120 170
SN74S241, SN74S244 120 180
Outputs disabled SN54S240 100 145
SN74S240 100 150
SN54S241, SN54S244 120 170
SN74S241, SN74S244 120 180
(1) For conditions shown as minimum or maximum, use the appropriate value specified under recommended operating conditions.
(2) All typical values are at VCC = 5 V, TA = 25°C.
(3) Not more than one output must be shorted at a time, and duration of the short-circuit must not exceed one second.

6.7 Switching Characteristics – SNx4LS24x

VCC = 5 V, TA = 25°C (see SN54LS24x and SN74LS24x Devices)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH RL = 667 Ω, CL = 45 pF SNx4LS240 9 14 ns
SNx4LS241, SNx4LS244 12 18
tPHL RL = 667 Ω, CL = 45 pF 12 18 ns
tPZL RL = 667 Ω, CL = 45 pF 20 30 ns
tPZH RL = 667 Ω, CL = 45 pF 15 23 ns
tPLZ RL = 667 Ω, CL = 5 pF 10 20 ns
tPHZ RL = 667 Ω, CL = 5 pF 15 25 ns

6.8 Switching Characteristics – SNx4S24x

VCC = 5 V and TA = 25°C (see SN54S24x and SN74S24x Devices)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH RL = 90 Ω, CL = 50 pF SNx4S240 4.5 7 ns
SNx4S241, SNx4S244 6 9
tPHL RL = 90 Ω, CL = 50 pF SNx4S240 4.5 7 ns
SNx4S241, SNx4S244 6 9
tPZL RL = 90 Ω, CL = 50 pF 10 15 ns
tPZH RL = 90 Ω, CL = 50 pF SNx4S240 6.5 10 ns
SNx4S241, SNx4S244 8 12
tPLZ RL = 90 Ω, CL = 5 pF 10 15 ns
tPHZ RL = 90 Ω, CL = 5 pF 6 9 ns

6.9 Typical Characteristics

VCC = 5 V, TA = 25°C, CL = 45 pF, and RL = 667 Ω (unless otherwise noted)
SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240 SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244 D001_sdls146.gif Figure 1. Simulated Propagation Delay From Input to Output