JAJSR63E March 2001 – September 2023 SN74TVC3306
PRODUCTION DATA
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For the clamping configuration, the common GATE input must be connected to one side (An or Bn) of any one of the pass transistors, making that the VBIAS connection of the reference transistor and the opposite side (Bn or An) the VREF connection. When VBIAS is connected through a 200-kΩ resistor to a 3-V to 5.5-V VCC supply and VREF is set to 0 V to VCC – 0.6 V, the output of each switch has a maximum clamp voltage equal to VREF. A filter capacitor on VBIAS is recommended.