SCES625A February   2005  – November 2015 SN74VMEH22501A-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Live-Insertion Specifications
    7. 7.7  Timing Requirements for UBT Transceiver (I Version)
    8. 7.8  Switching Characteristics for Bus Transceiver Function (I Version)
    9. 7.9  Switching Characteristics for Bus Transceiver Function (M Version)
    10. 7.10 Switching Characteristics for UBT Transceiver (I Version)
    11. 7.11 Switching Characteristics for UBT Transceiver (M Version)
    12. 7.12 Switching Characteristics for Bus Transceiver Function (I Version)
    13. 7.13 Switching Characteristics for UBT (I Version)
    14. 7.14 Switching Characteristics for Bus Transceiver Function (I Version)
    15. 7.15 Switching Characteristics for UBT (I Version)
    16. 7.16 Skew Characteristics for Bus Transceiver (I Version)
    17. 7.17 Skew Characteristics for Bus Transceiver (M Version)
    18. 7.18 Skew Characteristics for UBT (I Version)
    19. 7.19 Skew Characteristics for UBT (M Version)
    20. 7.20 Skew Characteristics for Bus Transceiver (I Version)
    21. 7.21 Skew Characteristics for UBT (I Version)
    22. 7.22 Skew Characteristics for Bus Transceiver (I Version)
    23. 7.23 Skew Characteristics for UBT (I Version)
    24. 7.24 Maximum Data Transfer Rates
    25. 7.25 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Distributed-Load Backplane Switching Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Functional Description for Two 1-Bit Bus Transceivers
      2. 9.3.2 Functional Description for 8-Bit UBT Transceiver
      3. 9.3.3 VMEbus Summary
    4. 9.4 Device Functional Modes
      1. 9.4.1 Direction Control Model (1-Bit Transceiver)
      2. 9.4.2 Direction Control for 8 Bit UBT
      3. 9.4.3 Latch Storage and Clock Storage
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

12 Layout

12.1 Layout Guidelines

The stub length from the VMEH22501 to the connector should be as short as possible. To reduce system skew, stub lengths should be matched for all the data and control bits. Populating both sides of the daughter card may help optimize the stub lengths.

The 5-row connector and the 3-row connector specifications correspond completely. All the data and control lines have the same pin positions in these two connectors. This allows easy migration from a 3-row connector to a 5-row connector. If a 5-row connector is used instead of a 3-row connector, some bypass capacitors between the supply pins and GND of the external rows (at the back of the connector) will help reduce some ground-bounce noise.

TI recommends to use multiple bypass capacitors to stabilize the supply line. To reduce high-frequency noise, TI recommends a small capacitor (0.1 µF, or less) for every two VCC pins on the VME side of the VMEH22501. The capacitors should be as close as possible to the VCC pins. An additional large capacitor close to the chip helps maintain the dc level of the power-supply line.

If live insertion is required, TI recommends a specific power-up sequence to use the full live-insertion capability of the VMEH22501. The power-up sequence should be GND, BIAS VCC, OE pin, I/O ports, then VCC.

12.2 Layout Example

SN74VMEH22501A-EP layout_ex_sces625.gif Figure 15. Layout Recommendation