JAJSP93C June   1984  – October 2022 SN75176A

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Dissipation Rating Table
    5. 6.5 Electrical Characteristics – Driver
    6. 6.6 Electrical Characteristics – Receiver
    7. 6.7 Switching Characteristics – Driver
    8. 6.8 Switching Characteristics – Receiver
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Driver
      2. 8.3.2 Receiver
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Powered
      2. 8.4.2 Device Unpowered
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Trademarks
    2. 10.2 Electrostatic Discharge Caution
    3. 10.3 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
  • P|8
サーマルパッド・メカニカル・データ
発注情報

6.8 Switching Characteristics – Receiver

VCC = 5 V, CL = 15 pF, TA = 25°C
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
tPLHPropagation delay time, low-to-high-level outputVID = –1.5 V to 1.5 V, See Figure 7-62135ns
tPHLPropagation delay time, high-to-low-level output2335ns
tPZHOutput enable time to high levelSee Figure 7-71030ns
tPZLOutput enable time to low level1230ns
tPHZOutput disable time from high levelSee Figure 7-72035ns
tPLZOutput disable time from low level1725ns