JAJSPH2E May   2000  – January 2023 SN65LBC180A , SN75LBC180A

PRODUCTION DATA  

  1. 1特長
  2. 2概要
  3. 3Revision History
  4. 4Pin Configuration and Functions
  5. 5Reference
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Dissipation Ratings
    3. 5.3 RECOMMENDED OPERATING CONDITIONS
    4. 5.4 Thermal Information
    5. 5.5 Driver Electrical Characteristics
    6. 5.6 Driver Switching Characteristics
    7. 5.7 Receiver Electrical Characteristics
    8. 5.8 Receiver Switching Characteristics
    9.     Typical Characteristics
      1.      Parameter Measurement Information
  6. 6Detailed Description
    1. 6.1 Device Functional Modes
      1. 6.1.1 Functional Tables
      2. 6.1.2 Schematics of Inputs and Outputs
  7. 7Application Information
    1. 7.1 Typical Application Circuit
  8. 8Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 商標
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  9. 9Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • N|14
サーマルパッド・メカニカル・データ
発注情報

5.8 Receiver Switching Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output VID = –1.5 V to 1.5 V, See Figure 6-7 7 13 20 ns
tPHL Propagation delay time, high-to-low-level output 7 13 20 ns
tsk(p) Pulse skew ( | tPHL – tPLH | ) 0.5 1.5 ns
tr Output signal rise time 2.1 3.3 ns
tf Output signal fall time See Figure 6-7 2.1 3.3 ns
tPZH Output enable time to high level CL = 10 pF, See Figure 6-8 30 45 ns
tPZL Output enable time to low level 30 45 ns
tPHZ Output disable time from high level 20 40 ns
tPLZ Output disable time from low level 20 40 ns