JAJSVG9 October 2024 SN75LVPE3101
PRODUCTION DATA
PIN | TYPE | INTERNAL PULLUP PULLDOWN | DESCRIPTION | |
---|---|---|---|---|
NAME | NO. | |||
CH1_EQ1 | 2 | I (4-level) | PU (approx 45K) PD (approx 95K) | CH1_EQ1. Configuration pin used to control RX EQ level for RX1P/N. The state of this pin is sampled after the rising edge of EN. Refer to Figure 5-1 for details of timing. This pin along with CH1_EQ2 allows for up to 16 equalization settings. |
CH1_EQ2 | 3 | I (4-level) | CH1_EQ2. Configuration pin used to control RX EQ level for RX1P/N. The state of this pin is sampled after the rising edge of EN. Refer to Figure 5-1 for details of timing. This pin along with CH1_EQ1 allows for up to 16 equalization settings. | |
CH2_EQ1 | 16 | I (4-level) | CH2_EQ1. Configuration pin used to control RX EQ level for RX2P/N. The state of this pin is sampled after the rising edge of EN. Refer to Figure 5-1 for details of timing. This pin along with CH2_EQ2 allows for up to 16 equalization settings. | |
CH2_EQ2 | 17 | I (4-level) | CH2_EQ2. Configuration pin used to control RX EQ level for RX2P/N. The state of this pin is sampled after the rising edge of EN. Refer to Figure 5-1 for details of timing. This pin along with CH2_EQ1 allows for up to 16 equalization settings. | |
EN | 5 | I (2-level) | PU (approx 400K) | EN. Places SN75LVPE3101 into shutdown mode when asserted low. Normal operation when pin is asserted high. When in shutdown, the receiver terminations of the device are high impedance and the TX/RX channels are disabled. |
GND | 6, 10, 18, 21 | GND | — | Ground |
MODE | 7 | I | PU (approx 45 K) PD (approx 95K) |
MODE. The state of this pin is sampled after the rising edge of EN. Connect to GND through 20kΩ resistor. |
RSVD1 | 24 | O | — | RSVD1. Leave the pin unconnected. |
RSVD2 | 14 | I | PU (approx 400K) | RSVD2. Leave the pin unconnected. |
RX1N | 8 | 90Ω Differential Input | — | Inverting differential high-speed input for Channel 1 |
RX1P | 9 | Noninverting differential high-speed input for Channel 1 | ||
RX2N | 20 | 90Ω Differential Input | — | Inverting differential high-speed input for Channel 2 |
RX2P | 19 | Noninverting differential high-speed input for Channel 2 | ||
TEST1 | 4 | I | PU (approx 45K) PD (approx 95K) | TEST1. Must connect to GND directly or through 1kΩ resistor. |
TEST2 | 15 | I | PU (approx 45K) PD (approx 95K) | TEST2. Must connect to GND directly or through 1kΩ resistor. |
TX1N | 23 | 90Ω Differential Output | — | Inverting differential high-speed output for Channel 1 |
TX1P | 22 | Noninverting differential high-speed output for Channel 1 | ||
TX2N | 11 | 90Ω Differential Output | — | Inverting differential high-speed output for Channel 2 |
TX2P | 12 | Noninverting differential high-speed output for Channel 2 | ||
VCC | 1, 13 | Power | — | 3.3V (±10%) supply |
Thermal pad | — | Thermal pad. Recommend connecting to a solid ground plane. |