SLASF36A January 2024 – December 2024 TAC5311-Q1
PRODUCTION DATA
This section describes the control registers for the device in detail. All these registers are eight bits in width and allocated to device configuration and programmable coefficients settings. These registers are mapped internally using a page scheme that can be controlled using either I2C or SPI communication to the device. Each page contains 128 bytes of registers. All device configuration registers are stored in page 0, page 1 and page 3. Page 0 is the default page setting at power up (and after a software reset). The device current page can be switch to a new desired page by using the PAGE[7:0] bits located in register 0 of every page.
Do not read from or write to reserved pages or reserved registers. Write only default values for the reserved bits in the valid registers.
The procedure for register access across pages is: