SLASF33 January   2024 TAC5412-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Thermal Information
    6. 5.6  Electrical Characteristics
    7. 5.7  Timing Requirements: I2C Interface
    8. 5.8  Switching Characteristics: I2C Interface
    9. 5.9  Timing Requirements: SPI Interface
    10. 5.10 Switching Characteristics: SPI Interface
    11. 5.11 Timing Requirements: TDM, I2S or LJ Interface
    12. 5.12 Switching Characteristics: TDM, I2S or LJ Interface
    13. 5.13 Timing Requirements: PDM Digital Microphone Interface
    14. 5.14 Switching Characteristics: PDM Digial Microphone Interface
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Serial Interfaces
        1. 6.3.1.1 Control Serial Interfaces
        2. 6.3.1.2 Audio Serial Interfaces
          1. 6.3.1.2.1 Time Division Multiplexed Audio (TDM) Interface
          2. 6.3.1.2.2 Inter IC Sound (I2S) Interface
          3. 6.3.1.2.3 Left-Justified (LJ) Interface
      2. 6.3.2  Using Multiple Devices With Shared Buses
      3. 6.3.3  Phase-Locked Loop (PLL) and Clock Generation
      4. 6.3.4  Input Channel Configuration
      5. 6.3.5  Reference Voltage
      6. 6.3.6  Microphone Bias
      7. 6.3.7  Input DC Fault Diagnostics
        1. 6.3.7.1 Fault Conditions
          1. 6.3.7.1.1 Input Pin Short to Ground
          2. 6.3.7.1.2 Input Pin Short to MICBIAS
          3. 6.3.7.1.3 Open Inputs
          4. 6.3.7.1.4 Short Between INxP and INxM
          5. 6.3.7.1.5 Input Pin Overvoltage
          6. 6.3.7.1.6 Input Pin Short to VBAT_IN
        2. 6.3.7.2 Fault Reporting
          1. 6.3.7.2.1 Overcurrent and Overtemperature Protection
      8. 6.3.8  Signal-Chain Processing
        1. 6.3.8.1 ADC Signal-Chain
          1. 6.3.8.1.1 Programmable Channel Gain and Digital Volume Control
          2. 6.3.8.1.2 Programmable Channel Gain Calibration
          3. 6.3.8.1.3 Programmable Channel Phase Calibration
          4. 6.3.8.1.4 Programmable Digital High-Pass Filter
          5. 6.3.8.1.5 Programmable Digital Biquad Filters
          6. 6.3.8.1.6 Programmable Channel Summer and Digital Mixer
          7. 6.3.8.1.7 Configurable Digital Decimation Filters
            1. 6.3.8.1.7.1 Linear Phase Filters
              1. 6.3.8.1.7.1.1 Sampling Rate: 16kHz or 14.7kHz
              2. 6.3.8.1.7.1.2 Sampling Rate: 24kHz or 22.05kHz
              3. 6.3.8.1.7.1.3 Sampling Rate: 32kHz or 29.4kHz
              4. 6.3.8.1.7.1.4 Sampling Rate: 48kHz or 44.1kHz
              5. 6.3.8.1.7.1.5 Sampling Rate: 96kHz or 88.2kHz
              6. 6.3.8.1.7.1.6 Sampling Rate: 384kHz or 352.8kHz
      9. 6.3.9  DAC Signal-Chain
        1. 6.3.9.1 Programmable Channel Gain and Digital Volume Control
        2. 6.3.9.2 Programmable Channel Gain Calibration
        3. 6.3.9.3 Programmable Digital High-Pass Filter
        4. 6.3.9.4 Programmable Digital Biquad Filters
        5. 6.3.9.5 Programmable Digital Mixer
        6. 6.3.9.6 Configurable Digital Interpolation Filters
          1. 6.3.9.6.1 Linear Phase Filters
            1. 6.3.9.6.1.1 Sampling Rate: 16kHz or 14.7kHz
            2. 6.3.9.6.1.2 Sampling Rate: 24kHz or 22.05kHz
            3. 6.3.9.6.1.3 Sampling Rate: 32kHz or 29.4kHz
            4. 6.3.9.6.1.4 Sampling Rate: 48kHz or 44.1kHz
            5. 6.3.9.6.1.5 Sampling Rate: 96kHz or 88.2kHz
            6. 6.3.9.6.1.6 Sampling Rate: 384kHz or 352.8kHz
      10. 6.3.10 Interrupts, Status, and Digital I/O Pin Multiplexing
  8. 7 Register Maps
    1. 7.1 Page 0 Registers
    2. 7.2 Page 1 Registers
    3. 7.3 Page_3 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
  10. 9 Power Supply Recommendations
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.4 Input Channel Configuration

The TAC5412-Q1 consists of two pairs of analog input pins (INxP and INxM) that can be configured as either differential or single-ended inputs for the recording channel. The device supports simultaneous recording of up to two channels using the multichannel ADC. The input source for the analog pins can be either analog microphones or line, aux inputs from the system board. Table 6-8 describes how to set the input configuration for the record channel.

Table 6-8 Input Source Selection for the Record Channel
P0_R80_D[7:6] : ADC_CH1_INSRC[1:0]INPUT CHANNEL 1 RECORD SOURCE SELECTION
00 (default)Analog differential input for channel 1
01Analog single-ended input for channel 1
10 or 11Reserved (do not use this setting)

Similarly, the input source selection setting for input channel 2 can be configured using the ADC_CH2_INSRC[1:0] (P0_R85_D[7:6]) register bits.

The device supports the input DC fault diagnostic feature for microphone recording with the DC-coupled inputs configuration; however, the device also supports an option for AC-coupled inputs if the DC diagnostic is not required for the specific input pins.

For the DC-coupled line input configuration, the DC common-mode difference (INxP – INxM) for the analog input pins must be 0V to support the 10-VRMS full-scale differential input. For the DC-coupled microphone input configuration, the DC common-mode difference (INxP – INxM) for the analog input pins must be within 3.4V to 6.0V to support the 2-VRMS full-scale differential input in the default mode of operation. The DC differential common-mode voltage is later filtered out by the digital high-pass filter and the digital output full-scale corresponds to the 10VRMS AC signal in this case.

Figure 6-15 and Figure 6-16 show how to connect a DC-coupled microphone for a differential and single-ended input, respectively. The value of the external bias resistor, R1, must be appropriately chosen based upon the microphone impedance. For a differential input, the value of the external bias resistor is recommended to be used for half of the microphone impedance, whereas for a single-ended input, the external bias resistor is recommended to be the same as the microphone impedance.

GUID-3208EAB2-3EBD-4821-8BD0-8CBC1F1C70A5-low.gifFigure 6-15 DC-Coupled Microphone Differential Input Connection
GUID-35EF9141-5125-496B-8CD6-97A18D2DE38E-low.gifFigure 6-16 DC-Coupled Microphone Single-Ended Input Connection

In AC-coupled mode, the value of the coupling capacitor must be so chosen that the high-pass filter formed by the coupling capacitor and the input impedance do not affect the signal content. At power-up, before proper recording can begin, this coupling capacitor must be charged up to the common-mode voltage. For single-ended input configuration, the INxM pin must be grounded after the AC coupling capacitor in AC-coupled mode.

Figure 6-17 and Figure 6-18 show how to connect an AC-coupled microphone or line source for a differential and single-ended input, respectively. In AC-coupled mode, the device input pins INxP and INxM, must be biased appropriately for the DC common-mode value either using the on-chip MICBIAS output voltage along with external bias resistor, R0, or using an external bias generator circuit. The maximum value for resistor R0 depends upon the signal swing and the MICBIAS value programmed. See the TAC5xxx-Q1 AC Coupled External Resistor Calculator to calculate the R0 value for the desired system configuration.

GUID-36116C5D-214F-43EC-A06D-E5EF72712C7B-low.gifFigure 6-17 AC-Coupled Microphone or Line Differential Input Connection
GUID-2016FD97-0341-4F09-B27D-9697135ED890-low.gifFigure 6-18 AC-Coupled Microphone or Line Single-Ended Input Connection