SLASFC6
August 2024
TAS2120
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Device Functional Modes
6.3.1
Operational Modes
6.3.1.1
Hardware Shutdown
6.3.1.2
Hardware Config Modes
6.3.1.3
Software Power Modes Control and Software Reset
6.3.1.4
Efficiency and power saving modes
6.3.1.4.1
Noise Gate
6.3.1.4.2
Music Efficiency Mode
6.3.1.4.3
VDD Y-bridge
6.3.1.4.4
Class-H Boost
6.3.1.5
2S Battery Mode
6.3.1.6
External PVDD Mode
6.3.2
Faults and Status
6.3.2.1
Interrupt generation and clearing
6.4
Feature Description
6.4.1
PurePath™ Console 3 Software
6.4.2
Playback Signal Path
6.4.2.1
Digital Volume Control and Amplifier Output Level
6.4.2.2
High Pass Filter
6.4.2.3
Class-D Amplifier
6.4.2.4
Supply Tracking Limiters with Brown Out Prevention
6.4.2.4.1
Voltage Limiter and Clipping protection
6.4.2.5
Tone Generator
6.4.3
Digital Audio Serial Interface
6.4.3.1
Digital Loopback
6.4.4
Boost
6.4.5
Supply Voltage Monitors
6.4.6
Thermal Protection
6.4.7
Clocks and PLL
6.4.7.1
Auto clock based wakeup and clock errors
6.4.8
Digital IO pins
6.5
Programming
6.5.1
I2C Control Interface
6.5.2
I2C Address Selection
6.5.3
General I2C Operation
6.5.4
I2C Single-Byte and Multiple-Byte Transfers
6.5.5
I2C Single-Byte Write
6.5.6
I2C Multiple-Byte Write
6.5.7
I2C Single-Byte Read
6.5.8
I2C Multiple-Byte Read
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Mono/Stereo Configuration
7.2.2.2
Boost Converter Passive Devices
7.2.2.3
EMI Passive Devices
7.2.2.4
Miscellaneous Passive Devices
7.2.3
Application Performance Plots
8
Power Supply Recommendations
9
Layout
9.1
Layout Guidelines
9.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
12.1
Package Option Addendum
12.2
Tape and Reel Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RBG|26
MPQF809
サーマルパッド・メカニカル・データ
発注情報
slasfc6_oa
1
Features
Powerful Class-D amplifier
8.2W 1% THD+N
14.75V boost with 5.1A max current limit
Best in class efficiency
Upto 90% efficiency at system level for 8Ω load
12.9mW idle channel power, noise gate off
5mW idle channel power, noise gate on
Integrated 1.8V Y-bridge
High performance audio channel
4.2µV A-wt. idle channel noise
114dB Dynamic Range
-89dB THD+N
Low EMI performance with ERC and SSM
< 1µs chip to chip group delay matching
Advanced integrated features
Signal detection high efficiency modes
High accuracy voltage monitor & temp sensor
Programmable battery current limit at 39mA step size
Ease of use features
Hardware pin control or I
2
C control
1S battery, 2S battery, External PVDD (3S battery) supply
Clock based power up/down
Auto clock rate detection: 16 to 192kHz
MCLK free operation
Thermal and over current protection
Power Supplies and user interface
VBAT: 2.5V to 5.5V
VDD: 1.65V to 1.95V
IOVDD: 1.8V or 3.3V
VBAT_SNS: 2.5V to 10.0V
I
2
S/TDM: 8 channels
HW pin control or I
2
C based control
26-Pin, 0.4mm Pitch, QFN package