JAJSD19B August 2015 – February 2019 TAS2555
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
Decimal | Hex | DESCRIPTION | ||||
---|---|---|---|---|---|---|
BOOK NO. | PAGE NO. | REG. NO. | BOOK NO. | PAGE NO. | REG. NO. | |
0 | 0 | 0 | 0x00 | 0x00 | 0x00 | Page Select |
0 | 0 | 1 | 0x00 | 0x00 | 0x01 | Software Reset |
0 | 0 | 2-3 | 0x00 | 0x00 | 0x02-0x03 | Reserved |
0 | 0 | 4 | 0x00 | 0x00 | 0x04 | Power Control |
0 | 0 | 5 | 0x00 | 0x00 | 0x05 | Power Control 2 |
0 | 0 | 6 | 0x00 | 0x00 | 0x06 | Speaker Control |
0 | 0 | 7 | 0x00 | 0x00 | 0x07 | Mute |
0 | 0 | 8 | 0x00 | 0x00 | 0x08 | Channel Control |
0 | 0 | 9-31 | 0x00 | 0x00 | 0x09-0x1F | Reserved |
0 | 0 | 32 | 0x00 | 0x00 | 0x20 | CRC Checksum |
0 | 0 | 33 | 0x00 | 0x00 | 0x21 | Checksum Reset |
0 | 0 | 34 | 0x00 | 0x00 | 0x22 | Device DSP Mode |
0 | 0 | 35-39 | 0x00 | 0x00 | 0x23-0x27 | Reserved |
0 | 0 | 40 | 0x00 | 0x00 | 0x28 | Class-D SSM Mode |
0 | 0 | 41 | 0x00 | 0x00 | 0x29 | Reserved |
0 | 0 | 42 | 0x00 | 0x00 | 0x2A | Digital Playback Control |
0 | 0 | 43 | 0x00 | 0x00 | 0x2B | Current Limit |
0 | 0 | 44 | 0x00 | 0x00 | 0x2C | Clock Error Control 1 |
0 | 0 | 45 | 0x00 | 0x00 | 0x2D | Clock Error Control 2 |
0 | 0 | 46 | 0x00 | 0x00 | 0x2E | Clock Error Control 3 |
0 | 0 | 47-99 | 0x00 | 0x00 | 0x2F-0x63 | Reserved |
0 | 0 | 100 | 0x00 | 0x00 | 0x64 | Power Up Flag |
0 | 0 | 101-103 | 0x00 | 0x00 | 0x65-0x67 | Reserved |
0 | 0 | 104 | 0x00 | 0x00 | 0x68 | Interrupt Flags DAC & OCP/OTP Sticky |
0 | 0 | 105-107 | 0x00 | 0x00 | 0x69-0x6B | Reserved |
0 | 0 | 108 | 0x00 | 0x00 | 0x6C | DSP Interrupt Output Sticky |
0 | 0 | 109-120 | 0x00 | 0x00 | 0x6D-0x78 | Reserved |
0 | 0 | 121 | 0x00 | 0x00 | 0x79 | Power Modes |
0 | 0 | 122-126 | 0x00 | 0x00 | 0x7A-0x7E | Reserved |
0 | 0 | 127 | 0x00 | 0x00 | 0x7F | Book Selection |
0 | 1 | 0 | 0x00 | 0x01 | 0x00 | Page Select |
0 | 1 | 1 | 0x00 | 0x01 | 0x01 | ASI1 DAC Format |
0 | 1 | 2 | 0x00 | 0x01 | 0x02 | ASI1 ADC Format |
0 | 1 | 3 | 0x00 | 0x01 | 0x03 | ASI1 Offset |
0 | 1 | 4-6 | 0x00 | 0x01 | 0x04-0x06 | Reserved |
0 | 1 | 7 | 0x00 | 0x01 | 0x07 | ASI1 ADC Path |
0 | 1 | 8 | 0x00 | 0x01 | 0x08 | ASI1 DAC BCLK |
0 | 1 | 9 | 0x00 | 0x01 | 0x09 | ASI1 DAC WCLK |
0 | 1 | 10 | 0x00 | 0x01 | 0x0A | ASI1 ADC BCLK |
0 | 1 | 11 | 0x00 | 0x01 | 0x0B | ASI1 ADC WCLK |
0 | 1 | 12 | 0x00 | 0x01 | 0x0C | ASI1 DIN/DOUT MUX |
0 | 1 | 13 | 0x00 | 0x01 | 0x0D | ASI1 BDIV Clock Select |
0 | 1 | 14 | 0x00 | 0x01 | 0x0E | ASI1 BDIV Clock Ratio |
0 | 1 | 15 | 0x00 | 0x01 | 0x0F | ASI1 WDIV Clock Ratio |
0 | 1 | 16 | 0x00 | 0x01 | 0x10 | ASI1 DAC Clock Output |
0 | 1 | 17 | 0x00 | 0x01 | 0x11 | ASI1 ADC Clock Output |
0 | 1 | 18-20 | 0x00 | 0x01 | 0x12-0x14 | Reserved |
0 | 1 | 21 | 0x00 | 0x01 | 0x15 | ASI2 DAC Format |
0 | 1 | 22 | 0x00 | 0x01 | 0x16 | ASI2 ADC Format |
0 | 1 | 23 | 0x00 | 0x01 | 0x17 | ASI2 Offset |
0 | 1 | 24-26 | 0x00 | 0x01 | 0x18-0x1A | Reserved |
0 | 1 | 27 | 0x00 | 0x01 | 0x1B | ASI2 ADC Path |
0 | 1 | 28 | 0x00 | 0x01 | 0x1C | ASI2 DAC BCLK |
0 | 1 | 29 | 0x00 | 0x01 | 0x1D | ASI2 DAC WCLK |
0 | 1 | 30 | 0x00 | 0x01 | 0x1E | ASI2 ADC BCLK |
0 | 1 | 31 | 0x00 | 0x01 | 0x1F | ASI2 ADC WCLK |
0 | 1 | 32 | 0x00 | 0x01 | 0x20 | ASI2 DIN/DOUT MUX |
0 | 1 | 33 | 0x00 | 0x01 | 0x21 | ASI2 BDIV Clock Select |
0 | 1 | 34 | 0x00 | 0x01 | 0x22 | ASI2 BDIV Clock Ratio |
0 | 1 | 35 | 0x00 | 0x01 | 0x23 | ASI2 WDIV Clock Ratio |
0 | 1 | 36 | 0x00 | 0x01 | 0x24 | ASI2 DAC Clock Output |
0 | 1 | 37 | 0x00 | 0x01 | 0x25 | ASI2 ADC Clock Output |
0 | 1 | 38-60 | 0x00 | 0x01 | 0x26-0x3C | Reserved |
0 | 1 | 61 | 0x00 | 0x01 | 0x3D | BCLK1_GPIO1 Pin |
0 | 1 | 62 | 0x00 | 0x01 | 0x3E | WCLK1_GPIO2 Pin |
0 | 1 | 63 | 0x00 | 0x01 | 0x3F | DOUT1_GPIO3 Pin |
0 | 1 | 64 | 0x00 | 0x01 | 0x40 | IRQ_GPIO4 Pin |
0 | 1 | 65 | 0x00 | 0x01 | 0x41 | BCLK2_GPIO5 Pin |
0 | 1 | 66 | 0x00 | 0x01 | 0x42 | WCLK2_GPIO6 Pinb |
0 | 1 | 67 | 0x00 | 0x01 | 0x43 | DOUT2_GPIO7 Pin |
0 | 1 | 68 | 0x00 | 0x01 | 0x44 | DIN2_GPIO8 Pin |
0 | 1 | 69 | 0x00 | 0x01 | 0x45 | ICC_CLK_GPIO9 Pin |
0 | 1 | 70 | 0x00 | 0x01 | 0x46 | ICC_GPIO10 Pin |
0 | 1 | 71-76 | 0x00 | 0x01 | 0x47-0x4C | Reserved |
0 | 1 | 77 | 0x00 | 0x01 | 0x4D | GPI Pin |
0 | 1 | 78 | 0x00 | 0x01 | 0x4E | Reserved |
0 | 1 | 79 | 0x00 | 0x01 | 0x4F | GPIO HIZ CTRL1 |
0 | 1 | 80 | 0x00 | 0x01 | 0x50 | GPIO HIZ CTRL2 |
0 | 1 | 81 | 0x00 | 0x01 | 0x51 | GPIO HIZ CTRL3 |
0 | 1 | 82 | 0x00 | 0x01 | 0x52 | GPIO HIZ CTRL4 |
0 | 1 | 83 | 0x00 | 0x01 | 0x53 | GPIO HIZ CTRL3 |
0 | 1 | 84-86 | 0x00 | 0x01 | 0x54-0x56 | Reserved |
0 | 1 | 87 | 0x00 | 0x01 | 0x57 | GPIO Pin 1 |
0 | 1 | 88 | 0x00 | 0x01 | 0x58 | GPIO Pin 2 |
0 | 1 | 89 | 0x00 | 0x01 | 0x59 | GPIO Pin 3 |
0 | 1 | 90-107 | 0x00 | 0x01 | 0x5A-0x6B | Reserved |
0 | 1 | 108 | 0x00 | 0x01 | 0x6C | Interrupt Control 1 |
0 | 1 | 109 | 0x00 | 0x01 | 0x6D | Interrupt Control 2 |
0 | 1 | 110 | 0x00 | 0x01 | 0x6E | Interrupt Control 3 |
0 | 1 | 111 | 0x00 | 0x01 | 0x6F | Interrupt Control 4 |
0 | 1 | 112 | 0x00 | 0x01 | 0x70 | Interrupt Control 5 |
0 | 1 | 113 | 0x00 | 0x01 | 0x71 | Interrupt Control 6 |
0 | 1 | 114-127 | 0x00 | 0x01 | 0x72-0xFF | Reserved Registers |
0 | 2 | 0 | 0x00 | 0x01 | 0x00 | Page Select Register |
0 | 2 | 1-5 | 0x00 | 0x01 | 0x01-0x05 | Reserved Registers |
0 | 2 | 6 | 0x00 | 0x01 | 0x06 | Ramp Generator Frequency |
0 | 2 | 7-23 | 0x00 | 0x01 | 0x07x17 | Reserved Registers |
0 | 2 | 24 | 0x00 | 0x01 | 0x18 | Inrush Optimization 1 |
0 | 2 | 25 | 0x00 | 0x01 | 0x19 | Inrush Optimization 2 |
0 | 2 | 26 | 0x00 | 0x01 | 0x1A | Inrush Optimization 3 |
0 | 2 | 27 | 0x00 | 0x01 | 0x1B | Inrush Optimization 4 |
0 | 2 | 28-127 | 0x00 | 0x01 | 0x1C-0x7F | Reserved Registers |
100 | 0 | 0 | 0x64 | 0x00 | 0x00 | Page Select Register |
100 | 0 | 1 | 0x64 | 0x00 | 0x01 | DAC Interpolation |
100 | 0 | 2 | 0x64 | 0x00 | 0x02 | ADC interpolation Register |
100 | 0 | 3-6 | 0x64 | 0x00 | 0x03-0x06 | Reserved Registers |
100 | 0 | 7 | 0x64 | 0x00 | 0x07 | DSP Mute Register |
100 | 0 | 8-15 | 0x64 | 0x00 | 0x0F | Reserved Registers |
100 | 0 | 16 | 0x64 | 0x00 | 0x10 | Interrupt 1 DSP |
100 | 0 | 17 | 0x64 | 0x00 | 0x11 | Interrupt 2 DSP |
100 | 0 | 18 | 0x64 | 0x00 | 0x12 | Condition 1 DSP |
100 | 0 | 19 | 0x64 | 0x00 | 0x13 | Condition 2 DSP |
100 | 0 | 20 | 0x64 | 0x00 | 0x14 | ISR and COND Control |
100 | 0 | 21 | 0x64 | 0x00 | 0x15 | DSP Control Register |
100 | 0 | 22-26 | 0x64 | 0x00 | 0x16-0x1A | Reserved Register |
100 | 0 | 27 | 0x64 | 0x00 | 0x1B | PLL CLKIN Divider |
100 | 0 | 28 | 0x64 | 0x00 | 0x1C | PLL J-VAL Divider |
100 | 0 | 29 | 0x64 | 0x00 | 0x1D | PLL D-VAL Divider 2 |
100 | 0 | 30 | 0x64 | 0x00 | 0x1E | D-VAL Divider 1 |
100 | 0 | 31 | 0x64 | 0x00 | 0x1F | DSP Clock |
100 | 0 | 32 | 0x64 | 0x00 | 0x20 | N-VAL Divider |
100 | 0 | 33 | 0x64 | 0x00 | 0x21 | MDAC-VAL Divider |
100 | 0 | 34 | 0x64 | 0x00 | 0x22 | MADC-VAL Divider |
100 | 0 | 35-37 | 0x64 | 0x00 | 0x23-0x25 | Reserved Register |
100 | 0 | 38 | 0x64 | 0x00 | 0x26 | Charge-pump Clock |
100 | 0 | 39 | 0x64 | 0x00 | 0x27 | Boost Clock |
100 | 0 | 40 | 0x64 | 0x00 | 0x28 | Ramp Clock 1 |
100 | 0 | 41-42 | 0x64 | 0x00 | 0x29-0x2A | Reserved Register |
100 | 0 | 43 | 0x64 | 0x00 | 0x2B | Ramp Clock 2 |
100 | 0 | 44 | 0x64 | 0x00 | 0x2C | Ramp Clock 3 |
100 | 0 | 45-126 | 0x64 | 0x00 | 0x2D-0x7E | Reserved Register |
100 | 0 | 127 | 0x64 | 0x00 | 0x7F | Book Selection |