JAJSD19B August 2015 – February 2019 TAS2555
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
BIT | FIELD | READ/
WRITE |
RESET
VALUE |
DESCRIPTION |
---|---|---|---|---|
D7-D5 | RESERVED | R | 000 | Reserved. Write only reset values. |
D4 | CLK_ERR1_INPUT | R/W | 0 | Clock error detection 1 input clock is
0: ASI1 1: ASI2 |
D3-D2 | CLK_ERR2_INPUT | R/W | 00 | Clock error detection 2 input clock is
00: DAC modulator clock 01: ADC modulator clock 10: PLL clock 11: Reserved |
D1 | CLK_ERR1_EN | R/W | 0 | Clock error detection 1 is
0: Disable 1: Enable |
D0 | CLK_ERR2_EN | R/W | 0 | Clock error detection 2 is
0: Disable 1: Enable |