JAJSGP8A October 2018 – December 2018 TAS2562
PRODUCTION DATA.
The device enters Hardware Shutdown mode if the SDZ pin is asserted low. In Hardware Shutdown mode, the device consumes the minimum quiescent current from VDD and VBAT supplies. All registers loose state in this mode and I2C communication is disabled.
In normal shutdown mode if SDZ is asserted low while audio is playing, the device will ramp down volume on the audio, stop the Class-D switching, power down analog and digital blocks and finally put the device into Hardware Shutdown mode. If configured in normal with timeout shutdown mode the device will force a hard shutdown after a timeout of the configurable shutdown timer. Finally the device can be configured for hard shutdown and will not attempt to gracefully stop the audio channel.
SDZ_MODE[1:0] | Setting |
---|---|
00
|
Normal Shutdown with Timer (default) |
01
|
Immediate Shutdown |
10
|
Normal Shutdown |
11
|
Reserved |
SDZ_TIMEOUT[1:0] | Setting |
---|---|
00
|
2 ms |
01
|
4 ms |
10
|
6 ms (default) |
11
|
23.8 ms |
When SDZ is released, the device will sample the AD0 and AD1 pins and enter the software shutdown mode.