JAJSHH5 May 2019 TAS5806MD
PRODUCTION DATA.
The TAS5806MD devices have flexible systems for clocking. Internally, the device requires a number of clocks, mostly at related clock rates to function correctly. All of these clocks can be derived from the Serial Audio Interface.
Figure 66 shows the basic data flow and clock Distribution.
The Serial Audio Interface typically has 3 connection pins which are listed as follows:
The device has an internal PLL that is used to take SCLK and create the higher rate clocks required by the DSP and the DAC clock.
The TAS5806MD device has an audio sampling rate detection circuit that automatically senses which frequency the sampling rate is operating. Common audio sampling frequencies of 32 kHz, 44.1kHz – 48 kHz, 88.2 kHz – 96 kHz are supported. The sampling frequency detector sets the clock for DAC and DSP automatically.