JAJSM70A June 2021 – November 2021 TAS6424E-Q1
PRODUCTION DATA
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Four overtemperature warning levels are available in the device (see the Register Maps section for thresholds). When the junction temperature exceeds the warning level, the WARN pin is asserted, unless the mask bit in Pin Control Register (address = 0x14) has been set to disable reporting. The device functions until the OTSD value is reached at which point all channels are placed in the Hi-Z state, and the FAULT pin is asserted. By default, the device remains shut down after the temperature drops to normal levels. This configuration can be changed in bit 3 of the Miscellaneous Control 3 Register (address = 0x21) to auto-recovery: When the junction temperature returns to normal levels, the device automatically recovers and places the channel into the state indicated by the state control register. Note that even in auto-recovery configuration the FAULT pin remains asserted until the CLEAR FAULT bit (bit 7) is set in register 0x21.