JAJSM70A June 2021 – November 2021 TAS6424E-Q1
PRODUCTION DATA
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If the output load current reaches ISD, such as an output short to GND, then a peak current limit occurs, which shuts down the channel. The time to shutdown the channel varies depending on the severity of the short condition. The affected channel is placed into the Hi-Z state, the fault is reported to the register, and the FAULT pin is asserted. The device remains in this state until the CLEAR FAULT bit is set in Miscellaneous Control 3 Register, 0x21 bit 7. After clearing this bit and if the diagnostics are enabled, the device automatically starts diagnostics on the channel and, if no load failure is found, the device restarts. If a load fault is found the device continues to rerun the diagnostics once per second. Because this hiccup mode uses the diagnostics, no high current is created. If the diagnostics are disabled, the device sets the state for that channel to Hi-Z and requires the MCU to take the appropriate action, setting the CLEAR FAULT bit after the fault got removed, in order to return to Play state.
Two programable levels can be set by bit 4 in the Miscellaneous Control 1 register (address 0x01).