JAJSD58
March 2017
TAS6424L-Q1
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
4
改訂履歴
5
概要(続き)
6
Device Comparison Table
7
Pin Configuration and Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal Information
8.5
Electrical Characteristics
8.6
Timing Requirements
8.7
Typical Characteristics
9
Parameter measurement Information
10
Detailed description
10.1
Overview
10.2
Functional Block Diagram
10.3
Feature Description
10.3.1
Serial Audio Port
10.3.1.1
I2S Mode
10.3.1.2
Left-Justified Timing
10.3.1.3
Right-Justified Timing
10.3.1.4
TDM Mode
10.3.1.5
Supported Clock Rates
10.3.1.6
Audio-Clock Error Handling
10.3.2
High-Pass Filter
10.3.3
Volume Control and Gain
10.3.4
High-Frequency Pulse-Width Modulator (PWM)
10.3.5
Gate Drive
10.3.6
Power FETs
10.3.7
Load Diagnostics
10.3.7.1
DC Load Diagnostics
10.3.7.2
Line Output Diagnostics
10.3.7.3
AC Load Diagnostics
10.3.8
Protection and Monitoring
10.3.8.1
Overcurrent Limit (ILIMIT)
10.3.8.2
Overcurrent Shutdown (ISD)
10.3.8.3
DC Detect
10.3.8.4
Clip Detect
10.3.8.5
Global Overtemperature Warning (OTW), Overtemperature Shutdown (OTSD)
10.3.8.6
Channel Overtemperature Warning [OTW(i)] and Shutdown [OTSD(i)]
10.3.8.7
Undervoltage (UV) and Power-On-Reset (POR)
10.3.8.8
Overvoltage (OV) and Load Dump
10.3.9
Power Supply
10.3.9.1
Vehicle-Battery Power-Supply Sequence
10.3.10
Hardware Control Pins
10.3.10.1
FAULT
10.3.10.2
WARN
10.3.10.3
MUTE
10.3.10.4
STANDBY
10.4
Device Functional Modes
10.4.1
Operating Modes and Faults
10.5
Programming
10.5.1
I2C Serial Communication Bus
10.5.2
I2C Bus Protocol
10.5.3
Random Write
10.5.4
Sequential Write
10.5.5
Random Read
10.5.6
Sequential Read
10.6
Register Maps
10.6.1
Mode Control Register (address = 0x00) [default = 0x00]
10.6.2
Miscellaneous Control 1 Register (address = 0x01) [default = 0x32]
10.6.3
Miscellaneous Control 2 Register (address = 0x02) [default = 0x62]
10.6.4
SAP Control (Serial Audio-Port Control) Register (address = 0x03) [default = 0x04]
10.6.5
Channel State Control Register (address = 0x04) [default = 0x55]
10.6.6
Channel 1 Through 4 Volume Control Registers (address = 0x05-0x08) [default = 0xCF]
10.6.7
DC Load Diagnostic Control 1 Register (address = 0x09) [default = 0x00]
10.6.8
DC Load Diagnostic Control 2 Register (address = 0x0A) [default = 0x11]
10.6.9
DC Load Diagnostic Control 3 Register (address = 0x0B) [default = 0x11]
10.6.10
DC Load Diagnostic Report 1 Register (address = 0x0C) [default = 0x00]
10.6.11
DC Load Diagnostic Report 2 Register (address = 0x0D) [default = 0x00]
10.6.12
DC Load Diagnostics Report 3 Line Output Register (address = 0x0E) [default = 0x00]
10.6.13
Channel State Reporting Register (address = 0x0F) [default = 0x55]
10.6.14
Channel Faults (Overcurrent, DC Detection) Register (address = 0x10) [default = 0x00]
10.6.15
Global Faults 1 Register (address = 0x11) [default = 0x00]
10.6.16
Global Faults 2 Register (address = 0x12) [default = 0x00]
10.6.17
Warnings Register (address = 0x13) [default = 0x20]
10.6.18
Pin Control Register (address = 0x14) [default = 0x00]
10.6.19
AC Load Diagnostic Control 1 Register (address = 0x15) [default = 0x00]
10.6.20
AC Load Diagnostic Control 2 Register (address = 0x16) [default = 0x00]
10.6.21
AC Load Diagnostic Impedance Report Ch1 through CH4 Registers (address = 0x17-0x1A) [default = 0x00]
10.6.22
AC Load Diagnostic Phase Report High Register (address = 0x1B) [default = 0x00]
10.6.23
AC Load Diagnostic Phase Report Low Register (address = 0x1C) [default = 0x00]
10.6.24
AC Load Diagnostic STI Report High Register (address = 0x1D) [default = 0x00]
10.6.25
AC Load Diagnostic STI Report Low Register (address = 0x1E) [default = 0x00]
10.6.26
Miscellaneous Control 3 Register (address = 0x21) [default = 0x00]
10.6.27
Clip Control Register (address = 0x22) [default = 0x01]
10.6.28
Clip Window Register (address = 0x23) [default = 0x14]
10.6.29
Clip Warning Register (address = 0x24) [default = 0x00]
10.6.30
ILIMIT Status Register (address = 0x25) [default = 0x00]
10.6.31
Miscellaneous Control 4 Register (address = 0x26) [default = 0x40]
11
Application and Implementation
11.1
Application Information
11.1.1
AM-Radio Band Avoidance
11.1.2
Parallel BTL Operation (PBTL)
11.1.3
Demodulation Filter Design
11.1.4
Line Driver Applications
11.2
Typical Applications
11.2.1
BTL Application
11.2.1.1
Design Requirements
11.2.1.2
Communication
11.2.1.3
Detailed Design Procedure
11.2.1.3.1
Hardware Design
11.2.1.3.2
Digital Input and the Serial Audio Port
11.2.1.3.3
Bootstrap Capacitors
11.2.1.3.4
Output Reconstruction Filter
11.2.1.4
Application Curves
11.2.2
PBTL Application
11.2.2.1
Design Requirements
11.2.2.1.1
Detailed Design Procedure
11.2.2.2
Application Curves
12
Power Supply Recommendations
13
Layout
13.1
Layout Guidelines
13.1.1
Electrical Connection of Thermal pad and Heat Sink
13.1.2
EMI Considerations
13.1.3
General Guidelines
13.2
Layout Example
13.3
Thermal Considerations
14
デバイスおよびドキュメントのサポート
14.1
ドキュメントのサポート
14.1.1
関連資料
14.2
ドキュメントの更新通知を受け取る方法
14.3
コミュニティ・リソース
14.4
商標
14.5
静電気放電に関する注意事項
14.6
Glossary
15
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DKQ|56
MPDS378A
サーマルパッド・メカニカル・データ
DKQ|56
PPTD313D
発注情報
jajsd58_oa
5
概要(続き)
PCB領域