JAJSPM3D July   2010  – January 2023 TCA6424A

PRODUCTION DATA  

  1. 1 特長
  2. 2 概要
  3. 3 Revision History
  4. 4 Description (continued)
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings (1)
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Reset Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Voltage Translation
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 I2C Interface
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Address
    5. 8.5 Programming
      1. 8.5.1 Power-On Reset
      2. 8.5.2 Reset Input ( RESET)
      3. 8.5.3 Interrupt Output ( INT)
      4. 8.5.4 Bus Transactions
        1. 8.5.4.1 Writes
        2. 8.5.4.2 Reads
    6. 8.6 Register Maps
      1. 8.6.1 Control Register and Command Byte
      2. 8.6.2 Register Descriptions
  9. 9 Application and Implementation
    1. 9.1 Typical Application
      1. 9.1.1 Detailed Design Procedure
        1. 9.1.1.1 Minimizing ICC When I/Os Control LEDs
    2. 9.2 Power Supply Recommendation
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 商標
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
      1.      Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 I2C Interface Timing Requirements

over recommended operating free-air temperature range (unless otherwise noted) (see GUID-6C4B78F0-B8D3-42B6-BDA6-B18217524EB0.html#SCPS133IMG6684)
STANDARD MODE
I2C BUS		FAST MODE
I2C BUS		UNIT
MINMAXMINMAX
fsclI2C clock frequency01000400kHz
tschI2C clock high time40.6μs
tsclI2C clock low time4.71.3μs
tspI2C spike time050050ns
tsdsI2C serial data setup time250100ns
tsdhI2C serial data hold time00ns
ticrI2C input rise time100020 + 0.1Cb #SCPS133164300ns
ticfI2C input fall time30020 + 0.1Cb #SCPS133164300ns
tocfI2C output fall time; 10 pF to 400 pF bus30020 + 0.1Cb #SCPS133164300μs
tbufI2C bus free time between Stop and Start4.71.3μs
tstsI2C Start or repeater Start condition setup time4.70.6μs
tsthI2C Start or repeater Start condition hold time40.6μs
tspsI2C Stop condition setup time40.6μs
tvd(data)Valid data time; SCL low to SDA output valid11μs
tvd(ack)Valid data time of ACK condition; ACK signal from SCL low to SDA (out) low11μs
(1) Cb = total capacitance of one bus line in pF