JAJSLQ7E
August 2011 – October 2024
TCA9509
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
I2C Interface Timing Requirements
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Two-Channel Bidirectional Buffer
7.3.2
Integrated A-Side Current Source
7.3.3
Standard Mode and Fast Mode Support
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Clock Stretching Support
8.2.2.2
VILC and Pulldown Strength Requirements
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
ドキュメントの更新通知を受け取る方法
11.2
サポート・リソース
11.3
商標
11.4
静電気放電に関する注意事項
11.5
用語集
12
Revision History
13
Mechanical, Packaging, and Orderable Information
13.1
Tape and Reel Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGK|8
MPDS028E
RVH|8
MPQF272B
サーマルパッド・メカニカル・データ
発注情報
jajslq7e_oa
jajslq7e_pm
6
Parameter Measurement Information
PIN
C
L
SCLA, SDAA (A-side)
50 pF
SDAB, SCLB (B-side)
50 pF
A.
R
T
termination resistance should be equal to Z
OUT
of pulse generators.
B.
C
L
includes probe and jig capacitance.
C.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z
O
= 50 Ω, slew rate ≥ 1 V/ns.
D.
The outputs are measured one at a time, with one transition per measurement.
E.
t
PLH
and t
PHL
are the same as t
pd
.
Figure 6-1
Test Circuit and Voltage Waveforms