JAJSFN8A
June 2018 – February 2022
TCA9517-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
概要 (続き)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
I2C Interface Switching Characteristics
7.8
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Two-Channel Bidirectional Buffer
9.3.2
Active-High Repeater-Enable Input
9.3.3
VOL B-Side Offset Voltage
9.3.4
Standard Mode and Fast Mode Support
9.3.5
Clock Stretching Support
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Clock Stretching Support
10.2.2.2
VILC and Pullup Resistor Sizing
10.2.3
Application Curve
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Device Support
13.2
Receiving Notification of Documentation Updates
13.3
サポート・リソース
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Glossary
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGK|8
MPDS028E
サーマルパッド・メカニカル・データ
発注情報
jajsfn8a_oa
jajsfn8a_pm
9.2
Functional Block Diagram