JAJSN80E August   2009  – May 2022 TCA9535

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
      1.      Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 5-V Tolerant I/O Ports
      2. 7.3.2 Hardware Address Pins
      3. 7.3.3 Interrupt ( INT) Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset (POR)
      2. 7.4.2 Powered-Up
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
        1. 7.5.1.1 Bus Transactions
          1. 7.5.1.1.1 Writes
          2. 7.5.1.1.2 Reads
      2. 7.5.2 Device Address
      3. 7.5.3 Control Register and Command Byte
    6. 7.6 Register Maps
      1. 7.6.1 Register Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Calculating Junction Temperature and Power Dissipation
        2. 8.2.1.2 Minimizing ICC When I/O is Used to Control LED
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5.2 Device Address

Figure 7-11 shows the address byte of the TCA9535.

GUID-16E82E77-12FB-4F49-8C5C-541DAE6F928C-low.gif Figure 7-11 TCA9535 Address

Table 7-2 shows the address reference of the TCA9535.

Table 7-2 Address Reference
INPUTSI2C BUS TARGET ADDRESS
A2A1A0
LLL32 (decimal), 0×20 (hexadecimal)
LLH33 (decimal), 0x21 (hexadecimal)
LHL34 (decimal), 0x22 (hexadecimal)
LHH35 (decimal), 0x23 (hexadecimal)
HLL36 (decimal), 0x24 (hexadecimal)
HLH37 (decimal), 0x25 (hexadecimal)
HHL38 (decimal), 0x26 (hexadecimal)
HHH39 (decimal), 0x27 (hexadecimal)

The last bit of the target address defines the operation (read or write) to be performed. A high (1) selects a read operation, while a low (0) selects a write operation.